參數(shù)資料
型號(hào)： PC28F640J3C-120
廠商： Intel Corp.
英文描述： Intel StrataFlash Memory (J3)
中文描述： 英特爾StrataFlash存儲(chǔ)器（J3）
文件頁數(shù)： 52/72頁
文件大?。?/td> 905K
代理商： PC28F640J3C-120
256-Mbit J3 (x8/x16)
52
Datasheet
Appendix A Common Flash Interface
The Common Flash Interface (CFI) specification outlines device and host system software
interrogation handshake which allows specific vendor-specified software algorithms to be used for
entire families of devices. This allows device independent, JEDEC ID-independent, and forward-
and backward-compatible software support for the specified flash device families. It allows flash
vendors to standardize their existing interfaces for long-term compatibility.
This appendix defines the data structure or “database” returned by the Common Flash Interface
(CFI) Query command. System software should parse this structure to gain critical information
such as block size, density, x8/x16, and electrical specifications. Once this information has been
obtained, the software will know which command sets to use to enable flash writes, block erases,
and otherwise control the flash component. The Query command is part of an overall specification
for multiple command set and control interface descriptions called Common Flash Interface, or
CFI.
A.1
Query Structure Output
The Query “database” allows system software to gain information for controlling the flash
component. This section describes the device’s CFI-compliant interface that allows the host system
to access Query data.
Query data are always presented on the lowest-order data outputs (D[7:0]) only. The numerical
offset value is the address relative to the maximum bus width supported by the device. On this
family of devices, the Query table device starting address is a 10h, which is a word address for x16
devices.
For a word-wide (x16) device, the first two bytes of the Query structure, “Q” and “R” in ASCII,
appear on the low byte at word addresses 10h and 11h. This CFI-compliant device outputs 00H
data on upper bytes. Thus, the device outputs ASCII “Q” in the low byte (D[7:0]) and 0x00 (00h)
in the high byte (D[15:8]).
At Query addresses containing two or more bytes of information, the least significant data byte is
presented at the lower address, and the most significant data byte is presented at the higher address.
In all of the following tables, addresses and data are represented in hexadecimal notation, so the
“h” suffix has been dropped. In addition, since the upper byte of word-wide devices is always
“00h,” the leading “00” has been dropped from the table notation and only the lower byte value is
shown. Any x16 device outputs can be assumed to have 00h on the upper byte in this mode.
相關(guān)PDF資料
PDF描述
PC28F256J3C-115 Intel StrataFlash Memory (J3)
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PC28F640J3C-115 Intel StrataFlash Memory (J3)
PC28F320J3C-115 Intel StrataFlash Memory (J3)
PC28F128J3C-120 Intel StrataFlash Memory (J3)
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
PC28F640J3C-125 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:Intel StrataFlash Memory (J3)
PC28F640J3C-150 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:Intel StrataFlash Memory (J3)
PC28F640J3D75 制造商:Intel 功能描述:
PC28F640J3D-75 制造商:Intel 功能描述:NOR Flash, 4M x 16, 64 Pin, Plastic, BGA
PC28F640J3D75A 功能描述:IC FLASH 64MBIT 75NS 64EZBGA RoHS:是 類別:集成電路 (IC) >> 存儲(chǔ)器 系列:StrataFlash™ 產(chǎn)品變化通告:Product Discontinuation 26/Apr/2010 標(biāo)準(zhǔn)包裝:136 系列:- 格式 - 存儲(chǔ)器:RAM 存儲(chǔ)器類型:SRAM - 同步，DDR II 存儲(chǔ)容量:18M（1M x 18） 速度:200MHz 接口:并聯(lián) 電源電壓:1.7 V ~ 1.9 V 工作溫度:0°C ~ 70°C 封裝/外殼:165-TBGA 供應(yīng)商設(shè)備封裝:165-CABGA（13x15） 包裝:托盤 其它名稱:71P71804S200BQ
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