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| 型號(hào)： | P95020ZLLGI8 |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類(lèi)： | 電源管理 |
| 英文描述： | 2-CHANNEL POWER SUPPLY MANAGEMENT CKT, PBGA124 |
| 封裝： | LLGA-124 |
| 文件頁(yè)數(shù)： | 56/137頁(yè) |
| 文件大小： | 3533K |
| 代理商： | P95020ZLLGI8 |
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P95020 / Preliminary Datasheet
Revision 0.7.10
25
2010 Integrated Device Technology, Inc.
to both ADC1 and the analog mixer for further processing. By using the analog mixer the analog microphone input may
be routed to ADC0, the line output port or the headphone output port.
2.4.2
AUDIO - Digital Microphone Input mode
The Digital Microphone Input path consists of:
Digital Microphone input buffer and MUX with the following features:
One or two microphones per DMICDATx input.
Mono data sampled during high or low clock level.
L/R swap
Versatile DMICSEL output pin for control of digital microphone modules or other external circuitry. (Used primarily to
enable/disable microphones that do not support power management using the clock pin.)
The digital microphone interface permits connection of a digital microphone(s) via the DMICDAT1, DMICDAT2, and
DMICCLK 3-pin interface. The DMICDAT1 and DMICDAT2 signals are inputs that carry individual channels of digital
microphone data to the ADC. In the event that a single microphone is used, the data is ported to both ADC channels.
This mode is selected using a register setting and the left time slot is copied to the ADC left and right inputs. The digital
microphone input is only available at ADC1.
The DMICCLK output is controllable from 4.704 MHz, 3.528 MHz, 2.352 MHz, 1.176 MHz and is synchronous to the
internal master clock (MCLK). The default frequency is 2.352 MHz.
To conserve power, the analog portion of the ADC and the analog boost amplifier will be turned off if the D-mic input is
selected. When switching from the digital microphone to an analog input to the ADC, the analog portion of the ADC will
be brought back to a full power state and allowed to stabilize before switching from the digital microphone to the analog
input. This should take less than 10mS.
The P95020 codec supports the following digital microphone configurations:
Table 4 - Valid Digital Mic Configurations
MODE
DIGITAL
MICS
DATA
SAMPLE
INPUT
NOTES
0
N/A
No Digital Microphones (1010 bit pattern sent to ADC to avoid pops)
1
2
Double Edge
DMICDAT1
Two microphones connected to DMICDAT1. PhAdj settings apply to Left microphone.
Right Microphone sampled on opposite phase. DMICDAT2 ignored.
2
Double Edge
DMICDAT2
Two microphones connected to DMICDAT2. PhAdj settings apply to Left microphone.
Right Microphone sampled on opposite phase. DMICDAT1 ignored.
3
2
Single Edge
DMICDAT1
and
DMICDAT2
DMICDAT1 used for left data and DMICDAT2 used for right data.
3
2
Double Edge
DMICDAT1
and
DMICDAT2
Two microphones, one on each data input. “Left” microphone used for each channel. Two
“Right” microphones may be used by inverting the microphone clock or adjusting the
sample phase.
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