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| 型號： | P95020ZLLGI8 |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 電源管理 |
| 英文描述： | 2-CHANNEL POWER SUPPLY MANAGEMENT CKT, PBGA124 |
| 封裝： | LLGA-124 |
| 文件頁數(shù)： | 118/137頁 |
| 文件大?。?/td> | 3533K |
| 代理商： | P95020ZLLGI8 |
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P95020 / Preliminary Datasheet
Revision 0.7.10
81
2010 Integrated Device Technology, Inc.
Function
Default Setting
Current Limit
100%
Clock Frequency
2 MHz
Operating Mode
PWM
After the external POR releases, the individual Global Enable bits can be set to HIGH. Since the default value of the local
ENABLE bit is LOW, the supply will not start at this time.
To enable a converter, the local ENABLE bit is set to HIGH by writing the voltage value to the Output Voltage Register.
The Output Voltage value must be included each time the converter is enabled or disabled. There is a default value for
each converter that can be read and written back along with the ENABLE bit or a different value can be written. When the
ENABLE bit becomes set the Buck Converter will then enter its soft-start sequence, and transition to the programmed
voltage.
NOTE: Changes to the Output Voltage Register settings can be written directly without disabling the converter.
8.5.2
BUCK1000 & BUCK500 - Normal Disabling / Enabling
Setting either the Global Enable bit to LOW or the local ENABLE bit to LOW will turn off the Buck Converter.
The Global Enable bits sole purpose is to shut down the converter into its lowest power shutdown mode. It is not
intended to be used to toggle the Buck Converter off and on. Proper operation is only guaranteed by toggling the
ENABLE bit once the Global Enable bit is set HIGH to take it out of low power shutdown mode.
8.5.3
BUCK1000 & BUCK500 - Soft Start Sequence
There is a 50 s delay after the ENABLE bit is set and then an internal counter ramps up, requiring 80 s/volt from zero to
the programmed Output Voltage setting. Once the Soft Start sequence is initiated, any changes to the values in the
Output Voltage Register are ignored until the Soft Start sequence is complete.
8.5.4
BUCK1000 & BUCK500 - Current Limit Protection
The Buck Converter includes pulse by pulse peak current limiting circuitry for over-current conditions. The limit can be set
at various percentages of maximum setting (See Table 20). During an over-current condition the output voltage is allowed
to drop below the specified voltage and will be indicated by the status of the PGOOD bit. When the over-current state is
ended the output returns to normal operation.
8.5.5
BUCK1000 & BUCK500 - Short Circuit Protection
The Buck Converter includes short-circuit protection circuitry. When a short circuit occurs, the output will be latched into a
disabled mode and a fault will be indicated in the SC_FAULT bit. The local ENABLE bit must be first toggled LOW and
then back to HIGH again to clear the short circuit latch. Any subsequent Short Circuit will override the local ENABLE bit
setting and re-latch the output to a disabled mode.
8.6
BUCK1000 & BUCK500 - APPLICATIONS INFORMATION
BUCK
CONTROLLER
VIN
FEEDBACK
OUT
VIN = 3.8V
GND
COUT
VOUT
CIN
L
1
2
P
CONTROL &
MONITORING
Figure 20
– BUCK500 or BUCK 1000 Applications Diagram
8.6.1
BUCK500 - Recommended External Components
ID
Description
CIN
10 F, 10V, Ceramic, X5R
COUT
22 F, 10V, Ceramic, X5R
L
4.7 H, 1.5A (for 1 MHz or 2 MHz operation)
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