參數(shù)資料
型號(hào)： P90CE201
廠商： NXP Semiconductors N.V.
英文描述： 16-bit microcontroller
中文描述： 16位微控制器
文件頁(yè)數(shù)： 53/77頁(yè)
文件大?。?/td> 235K
代理商： P90CE201
August 1993
53
Philips Semiconductors
Product specification
16-bit microcontroller
P90CE201
11 8-bit AUXILIARY PORT
Unused address pins can be used as auxiliary ports. The
selection of unused address pins (A23 to A16) for use as
auxiliary ports is controlled by the Auxiliary Port Control
Register (APCON).
Each bit in APCON controls one address pin. A logic 1
written to APCON.n enables the auxiliary port function of
the address pin A(n
+
16). The APCON bits and their
associated address pins are shown in Fig.37. A logic 0
written to APCON.n disables the auxiliary port function and
drives the internal address bus to A(n
+
16).
If bit APCON.n is set, a read from the corresponding bit
APP.n in the Auxiliary Port Pad/Register (APP), reads the
value from the address pin A(n
+
16). A write to APP.n
when APCON.n is set, drives the value of APP.n to the
address pin A(n
+
16). After RESET the auxiliary port
function is disabled (APCON = 00H).
The Auxiliary Port is configured as a quasi-bidirectional
port in the same way as described for the 8-bit General
Port. A port pin is set to input mode by writing a logic 1 to
the corresponding port register bit. This drives a “hard”
logic 1 to the corresponding output pin for a short period.
After this period the logic 1 level is maintained by a weak
pull-up transistor, which can be overwritten by an external
signal.
11.1
8-bit Auxiliary Port registers
11.1.1
A
UXILIARY
P
ORT
C
ONTROL
R
EGISTER
(APCON)
This register is located at address 8000 2083H.
11.1.2
A
UXILIARY
P
ORT
P
AD
/R
EGISTER
(APP)
This register is located at address 8000 2081H.
Fig.37 Auxiliary Port Control Register (APCON).
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
APCON.7
(A23)
APCON.6
(A22)
APCON.5
(A21)
APCON.4
(A20)
APCON.3
(A19)
APCON.2
(A18)
APCON.1
(A17)
APCON.0
(A16)
Fig.38 Auxiliary Port/Pad Register (APP).
bit 7
APP7
bit 6
APP6
bit 5
APP5
bit 4
APP4
bit 3
APP3
bit 2
APP2
bit 1
APP1
bit 0
APP0
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