參數(shù)資料
型號: P89V51RB2FA,529
廠商: NXP Semiconductors
文件頁數(shù): 56/80頁
文件大?。?/td> 0K
描述: IC 80C51 MCU FLASH 16K 44-PLCC
產(chǎn)品培訓模塊: Migrating from 8/16-Bit MCUs to 32-Bit ARMs
標準包裝: 156
系列: 89V
核心處理器: 8051
芯體尺寸: 8-位
速度: 40MHz
連通性: SPI,UART/USART
外圍設備: 欠壓檢測/復位,POR,PWM,WDT
輸入/輸出數(shù): 32
程序存儲器容量: 16KB(16K x 8)
程序存儲器類型: 閃存
RAM 容量: 1K x 8
電壓 - 電源 (Vcc/Vdd): 4.5 V ~ 5.5 V
振蕩器型: 內部
工作溫度: -40°C ~ 85°C
封裝/外殼: 44-LCC(J 形引線)
包裝: 管件
產(chǎn)品目錄頁面: 706 (CN2011-ZH PDF)
配用: 622-1017-ND - BOARD 44-ZIF PLCC SOCKET
622-1001-ND - USB IN-CIRCUIT PROG 80C51ISP
其它名稱: 568-2427-5
935278706529
P89V51RB2FA-S
P89V51RB2_RC2_RD2_5
NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 05 — 12 November 2009
6 of 80
NXP Semiconductors
P89V51RB2/RC2/RD2
8-bit microcontrollers with 80C51 core
5.2 Pin description
Table 3.
P89V51RB2/RC2/RD2 pin description
Symbol
Pin
Type
Description
DIP40
TQFP44
PLCC44
P0.0 to P0.7
I/O
Port 0: Port 0 is an 8-bit open drain bidirectional I/O port.
Port 0 pins that have ‘1’s written to them oat, and in this
state can be used as high-impedance inputs. Port 0 is also
the multiplexed low-order address and data bus during
accesses to external code and data memory. In this
application, it uses strong internal pull-ups when
transitioning to ‘1’s. Port 0 also receives the code bytes
during the external host mode programming, and outputs
the code bytes during the external host mode verication.
External pull-ups are required during program verication
or as a general purpose I/O port.
P0.0/AD0
39
37
43
I/O
P0.0 — Port 0 bit 0.
I/O
AD0 — Address/data bit 0.
P0.1/AD1
38
36
42
I/O
P0.1 — Port 0 bit 1.
I/O
AD1 — Address/data bit 1.
P0.2/AD2
37
35
41
I/O
P0.2 — Port 0 bit 2.
I/O
AD2 — Address/data bit 2.
P0.3/AD3
36
34
40
I/O
P0.3 — Port 0 bit 3.
I/O
AD3 — Address/data bit 3.
P0.4/AD4
35
33
39
I/O
P0.4 — Port 0 bit 4.
I/O
AD4 — Address/data bit 4.
P0.5/AD5
34
32
38
I/O
P0.5 — Port 0 bit 5.
I/O
AD5 — Address/data bit 5.
P0.6/AD6
33
31
37
I/O
P0.6 — Port 0 bit 6.
I/O
AD6 — Address/data bit 6.
P0.7/AD7
32
30
36
I/O
P0.7 — Port 0 bit 7.
I/O
AD7 — Address/data bit 7.
P1.0 to P1.7
I/O with
internal
pull-up
Port 1: Port 1 is an 8-bit bidirectional I/O port with internal
pull-ups. The Port 1 pins are pulled high by the internal
pull-ups when ‘1’s are written to them and can be used as
inputs in this state. As inputs, Port 1 pins that are
externally pulled LOW will source current (IIL) because of
the internal pull-ups. P1.5, P1.6, P1.7 have high current
drive of 16 mA. Port 1 also receives the low-order address
bytes during the external host mode programming and
verication.
P1.0/T2
1
40
2
I/O
P1.0 — Port 1 bit 0.
I/O
T2 — External count input to Timer/counter 2 or Clock-out
from Timer/counter 2.
P1.1/T2EX
2
41
3
I/O
P1.1 — Port 1 bit 1.
I
T2EX: Timer/counter 2 capture/reload trigger and direction
control.
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P89V51RC2BN 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:8-bit 80C51 5 V low power 16/32/64 kB Flash microcontroller with 1 kB RAM