參數(shù)資料
型號: P89V51RB2FA,529
廠商: NXP Semiconductors
文件頁數(shù): 41/80頁
文件大?。?/td> 0K
描述: IC 80C51 MCU FLASH 16K 44-PLCC
產(chǎn)品培訓(xùn)模塊: Migrating from 8/16-Bit MCUs to 32-Bit ARMs
標(biāo)準(zhǔn)包裝: 156
系列: 89V
核心處理器: 8051
芯體尺寸: 8-位
速度: 40MHz
連通性: SPI,UART/USART
外圍設(shè)備: 欠壓檢測/復(fù)位,POR,PWM,WDT
輸入/輸出數(shù): 32
程序存儲器容量: 16KB(16K x 8)
程序存儲器類型: 閃存
RAM 容量: 1K x 8
電壓 - 電源 (Vcc/Vdd): 4.5 V ~ 5.5 V
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 44-LCC(J 形引線)
包裝: 管件
產(chǎn)品目錄頁面: 706 (CN2011-ZH PDF)
配用: 622-1017-ND - BOARD 44-ZIF PLCC SOCKET
622-1001-ND - USB IN-CIRCUIT PROG 80C51ISP
其它名稱: 568-2427-5
935278706529
P89V51RB2FA-S
P89V51RB2_RC2_RD2_5
NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 05 — 12 November 2009
46 of 80
NXP Semiconductors
P89V51RB2/RC2/RD2
8-bit microcontrollers with 80C51 core
6.9 PCA
The PCA includes a special 16-bit Timer that has ve 16-bit capture/compare modules
associated with it. Each of the modules can be programmed to operate in one of four
modes: rising and/or falling edge capture, software timer, high-speed output, or PWM.
Each module has a pin associated with it in port 1. Module 0 is connected to P1.3 (CEX0),
module 1 to P1.4 (CEX1), etc. Registers CH and CL contain current value of the free
running up counting 16-bit PCA timer. The PCA timer is a common time base for all ve
modules and can be programmed to run at: 1
6 the oscillator frequency,
1
2 the oscillator
frequency, the Timer 0 overow, or the input on the ECI pin (P1.2). The timer count source
is determined from the CPS1 and CPS0 bits in the CMOD SFR (see Table 35 and
Table 33.
WDTC - Watchdog control register (address COH) bit allocation
Bit addressable; Reset value: 00H
Bit
7
6
5
4
3
2
1
0
Symbol
-
WDOUT
WDRE
WDTS
WDT
SWDT
Table 34.
WDTC - Watchdog control register (address COH) bit description
Bit
Symbol
Description
7 to 5
-
Reserved for future use. Should be set to ‘0’ by user programs.
4
WDOUT
Watchdog output enable. When this bit and WDRE are both set, a
Watchdog reset will drive the reset pin active for 32 clocks.
3
WDRE
Watchdog timer reset enable. When set enables a watchdog timer
reset.
2
WDTS
Watchdog timer reset ag, when set indicates that a WDT reset
occurred. Reset in software.
1
WDT
Watchdog timer refresh. Set by software to force a WDT reset.
0
SWDT
Start watchdog timer, when set starts the WDT. When cleared, stops
the WDT.
Fig 21. PCA
MODULE0
PCA TIMER/COUNTER
P1.3/CEX0
MODULE1
P1.4/CEX1
MODULE2
P1.5/CEX2
MODULE3
P1.6/CEX3
MODULE4
P1.7/CEX4
time base for PCA modules
Module functions:
- 16-bit capture
- 16-bit timer
- 16-bit high speed output
- 8-bit PWM
- watchdog timer (module 4 only)
16 bits
002aaa532
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