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參數(shù)資料
| 型號： | P28F001BX-T70 |
| 廠商： | INTEL CORP |
| 元件分類： | PROM |
| 英文描述： | 1-MBIT (128K x 8) BOOT BLOCK FLASH MEMORY |
| 中文描述： | 128K X 8 FLASH 12V PROM, 70 ns, PDIP32 |
| 封裝： | 0.620 X 1.640 INCH, PLASTIC, DIP-32 |
| 文件頁數(shù)： | 6/33頁 |
| 文件大?。?/td> | 436K |
| 代理商： | P28F001BX-T70 |
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28F001BX-T/28F001BX-B
PRINCIPLES OF OPERATION
The 28F001BX introduces on-chip write automation
to manage write and erase functions. The write state
machine allows for 100% TTL-level control inputs,
fixed power supplies during erasure and program-
ming, minimal processor overhead with RAM-like
write timings, and maximum EPROM compatiblity.
After initial device powerup, or after return from
deep powerdown mode (see Bus Operations), the
28F001BX functions as a read-only memory. Manip-
ulation of external memory-control pins yield stan-
dard EPROM read, standby, output disable or Intelli-
gent Identifier operations. Both Status Register and
Intelligent Identifiers can be accessed through the
Command Register when V
PP
e
V
PPL
.
This same subset of operations is also available
when high voltage is applied to the V
PP
pin. In addi-
tion, high voltage on V
PP
enables successful erasure
and programming of the device. All functions associ-
ated
with
altering
memory
erase, status, and inteligent IdentifierDare accessed
via the Command Register and verified through the
Status Register.
contentsDprogram,
Commands are written using standard microproces-
sor write timings. Register contents serve as input to
the WSM, which controls the erase and program-
ming circuitry. Write cycles also internally latch ad-
dresses and data needed for programming or erase
operations. With the appropriate command written to
the register, standard microprocessor read timings
output array data, access the intelligent identifier
codes, or output program and erase status for verifi-
cation.
Interface software to initiate and poll progress of in-
ternal program and erase can be stored in any of the
28F001BX blocks. This code is copied to, and exe-
cuted from, system RAM during actual flash memory
update. After successful completion of program
and/or erase, code execution out of the 28F001BX
is again possible via the Read Array command.
Erase suspend/resume capability allows system
software to suspend block erase and read data/exe-
cute code from any other block.
Command Register and Write
Automation
An on-chip state machine controls block erase and
byte program, freeing the system processor for other
tasks. After receiving the erase setup and erase
confirm commands, the state machine controls
block pre-conditioning and erase, returning progress
via the Status Register. Programming is similarly
controlled, after destination address and expected
data are supplied. The program algorithm of past In-
tel Flash Memories is now regulated by the state
machine, including program pulse repetition where
required and internal verification and margining of
data.
Data Protection
Depending on the application, the system designer
may choose to make the V
PP
power supply switcha-
ble (available only when memory updates are re-
quired) or hardwired to V
PPH
. When V
PP
e
V
PPL
,
memory contents cannot be altered. The 28F001BX
Command Register architecture provides protection
from unwanted program or erase operations even
when high voltage is applied to V
PP
. Additionally, all
functions are disabled whenever V
CC
is below the
write lockout voltage V
LKO
, or when RP
Y
is at V
IL
.
The 28F001BX accommodates either design prac-
tice and encourages optimization of the processor-
memory interface.
The two-step program/erase write sequence to the
Command Register provides additional software
write protection.
1FFFF
8-KByte BOOT BLOCK
1DFFF
1E000
4-KByte PARAMETER BLOCK
1CFFF
1D000
4-KByte PARAMETER BLOCK
1BFFF
1C000
112-KByte MAIN BLOCK
00000
Figure 7. 28F001BX-T Memory Map
1FFFF
112-KByte MAIN BLOCK
03FFF
04000
4-KByte PARAMETER BLOCK
02FFF
03000
4-KByte PARAMETER BLOCK
01FFF
02000
8-KByte BOOT BLOCK
00000
Figure 8. 28F001BX-B Memory Map
6
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| P28F001BX-T90 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:1-MBIT (128K x 8) BOOT BLOCK FLASH MEMORY |
| P28F002BC-T120 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:28F002BC 2-MBIT (256K X 8) BOOT BLOCK FLASH MEMORY |
| P28F002BC-T80 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:28F002BC 2-MBIT (256K X 8) BOOT BLOCK FLASH MEMORY |
| P28F010120 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| P28F010-120 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:28F010 1024K (128K X 8) CMOS FLASH MEMORY |
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