參數(shù)資料
型號(hào)： NT7501H-BDT
廠商： Electronic Theatre Controls, Inc.
英文描述： 33 X 100 RAM-Map LCD Controller/Driver
中文描述： 33 × 100 RAM的地圖LCD控制器/驅(qū)動(dòng)器
文件頁數(shù)： 9/38頁
文件大小： 319K
代理商： NT7501H-BDT
NT7501
9
Busy Flag
The Busy flag is set when the NT7501 starts to operate. During operation, it accepts Read Status instruction only. The busy flag
signal is output at pad D7 when Read Status is issued. If the cycle time (t
CYC
) is correct, the microprocessor need not check the
flag before issuing a command. This can greatly improve the microprocessor performance.
Initial Display Line Register
When the display RAM data is read, the display line, according to COM0 (usually, the top line of screen), is determined using
register data. The register is also used for screen scrolling and page switching.
The set Display Start Line command sets the 6-bit display start address in this register. The register data is preset on the line
counter each time the FR signal status changes. The line counter is incremented by CL signal and it generates a line address to
allow 132 bit.
Column Address Counter
This is a 8 bit presettable counter that provides the column address to the display RAM (refer to Figure4). It is incremented by 1
when a Read/Write command is entered. However, the counter is not incremented but locked if a non-existing address above
84H is specified. It is unlocked when a column address is set again. The Column Address counter is independent of the Page
Address register.
When the ADC Select command is issued to display an inverse display, the column address decoder inverts the relationship
between the RAM column address and the display segment output.
Page Address Register
This is a 4-bit page address register that provides a page address to the display RAM (refer to Figure 4). The microprocessor
issues Set Page Address command to change the page and access to another page. Page address 8 (D3 is high, but D2,D1
and D0 are low) is RAM area dedicated to the indicator, and only display data D0 is valid.
Display Data RAM
The display data RAM stores pixel data for the LCD. It is a 65-column by 132-row (8-page by 8 bit + 1) addressable array. Each
pixel can be selected when the page and column addresses are specified.
The time required to transfer data is very short because the microprocessor enters D0 to D7 corresponding to the LCD common
lines as shown in Figure 3. Therefore, multiple NT7501’s can easily configure a large display having high flexibility with very
little data transmission restriction.
The microprocessor writes and reads data to/from the RAM through the I/O buffer. As the LCD controller operates
independently, data can be written into the RAM at the same time as the data is being displayed, without causing the LCD to
flicker.
1
0
1
0
1
D0
D1
D2
D3
D4
COM0
COM1
COM2
COM3
COM4
Display data RAM
Display on LCD
Figure 3.
相關(guān)PDF資料
PDF描述
NT7502 65 X 132 RAM-Map LCD Controller / Driver
NT7502H-BDT 65 X 132 RAM-Map LCD Controller / Driver
NT7502H-TABF1 65 X 132 RAM-Map LCD Controller / Driver
NT7603 2 x 110 W class-D power amplifer, SOT566-3 (HSOP24), Reel Pack, SMD, 13"
NT7603BDB-01 Class D Audio Amplifier, SOT549-1 (HTSSOP32), Reel Dry Pack, SMD, 13"
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
NT7502 制造商:未知廠家 制造商全稱:未知廠家 功能描述:65 X 132 RAM-Map LCD Controller / Driver
NT7502H-BDT 制造商:未知廠家 制造商全稱:未知廠家 功能描述:65 X 132 RAM-Map LCD Controller / Driver
NT7502H-TABF1 制造商:未知廠家 制造商全稱:未知廠家 功能描述:65 X 132 RAM-Map LCD Controller / Driver
NT75-1 制造商:DBLECTRO 制造商全稱:DB Lectro Inc 功能描述:Low coil consumption. / Switching capacity up to 16A.
NT751AS12DC110V 制造商:DBLECTRO 制造商全稱:DB Lectro Inc 功能描述:Switching capacity up to 16A.
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購

我的聯(lián)系方式

*
*
*