- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄363666 > NSC800V (National Semiconductor Corporation) NSC800TM High-Performance Low-Power CMOS Microprocessor PDF資料下載
參數(shù)資料
| 型號： | NSC800V |
| 廠商： | National Semiconductor Corporation |
| 英文描述： | NSC800TM High-Performance Low-Power CMOS Microprocessor |
| 中文描述： | NSC800TM高性能低功耗CMOS微處理器 |
| 文件頁數(shù)： | 37/76頁 |
| 文件大小： | 785K |
| 代理商： | NSC800V |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁當前第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁
12.6 8-Bit Arithmetic
(Continued)
7
6
5
4
3
2
1
0
1
0
1
0
0
r
Timing:
M cyclesD1
T statesD4
Addressing Mode:
SourceDRegister
DestinationDImplied
OR
r
Logically OR the contents of the r register and the Accumu-
lator.
A
w
A
r
S: Set if result is negative
Z: Set if result is zero
H: Reset
P/V: Set if result parity is even
N: Reset
C: Reset
0
7
6
5
4
3
2
1
1
0
1
1
0
r
Timing:
M cyclesD1
T statesD4
Addressing Mode:
SourceDRegister
DestinationDImplied
XOR
r
Logically exclusively OR the contents of the r register with
the Accumulator.
A
w
A
Z
r
S: Set if result is negative
Z: Set if result is zero
H: Reset
P/V: Set if result parity is even
N: Reset
C: Reset
0
7
6
5
4
3
2
1
1
0
1
0
1
r
Timing:
M cyclesD1
T statesD4
Addressing Mode:
SourceDRegister
DestinationDImplied
INC
r
Increment register r.
r
w
r
a
1
S: Set if result is negative
Z: Set if result is zero
H: Set if carry from bit 3
P/V: Set only if r was X’7F before
operation
N: Reset
C: N/A
7
6
5
4
3
2
1
0
0
0
r
1
0
0
Timing:
M cyclesD1
T statesD4
Addressing Mode:
SourceDRegister
DestinationDRegister
CP
r
Compare the contents of register r with the Accumulator
and set the flags accordingly.
A
b
r
S: Set if result is negative
Z: Set if result is zero
H: Set if borrow from bit 4
P/V: Set if result exceeds 8-bit 2’s
complement range
N: Set
C: Set according to borrow
0
7
6
5
4
3
2
1
1
0
1
1
1
r
Timing:
M cyclesD1
T statesD4
Addressing Mode:
SourceDRegister
DestinationDImplied
DEC
r
Decrement the contents of register r.
r
w
r
b
1
S: Set if result is negative
Z: Set if result is zero
H: Set according to a borrow from
bit 4
P/V: Set only if r was X’80 prior to
operation
N: Set
C: N/A
0
7
6
5
4
3
2
1
0
0
r
1
0
1
Timing:
M cyclesD1
T statesD4
Addressing Mode:
SourceDRegister
DestinationDRegister
CPL
Complement the Accumulator (1’s complement).
A
w
A
S: N/A
Z: N/A
H: Set
P/V: N/A
N: Set
C: N/A
37
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| NSC858 | NSC858 Universal Asynchronous Receiver/Transmitter |
| NSC858D | NSC858 Universal Asynchronous Receiver/Transmitter |
| NSC858E | NSC858 Universal Asynchronous Receiver/Transmitter |
| NSC858N | NSC858 Universal Asynchronous Receiver/Transmitter |
| NSC858V | NSC858 Universal Asynchronous Receiver/Transmitter |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| NSC800V-1 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microprocessor |
| NSC810AD | 制造商:National Semiconductor Corporation 功能描述:22 I/O, PIA-GENERAL PURPOSE, 40 Pin Ceramic DIP |
| NSC810AD/B | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| NSC810AD-1/883 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:RAM I/O Timer |
| NSC810AD-1/A+ | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:RAM I/O Timer |
發(fā)布緊急采購，3分鐘左右您將得到回復。