參數(shù)資料
型號: NSC800V
廠商: National Semiconductor Corporation
英文描述: NSC800TM High-Performance Low-Power CMOS Microprocessor
中文描述: NSC800TM高性能低功耗CMOS微處理器
文件頁數(shù): 36/76頁
文件大?。?/td> 785K
代理商: NSC800V
12.6 8-Bit Arithmetic
REGISTER ADDRESSING ARITHMETIC
Hex
Value
In
Upper
Digit
(Bits 7-4)
Hex
Value
In
Lower
Digit
(Bits 3-0)
C
H
Number
Added
To
Byte
C
Op
Before
DAA
Before
DAA
After
DAA
0
0
0
0
0
0
1
1
1
0-9
0-8
0-9
A-F
9-F
A-F
0-2
0-2
0-3
0
0
1
0
0
1
0
0
1
0-9
A-F
0-3
0-9
A-F
0-3
0-9
A-F
0-3
00
06
06
60
66
66
60
66
66
0
0
0
1
1
1
1
1
1
ADD
ADC
INC
SUB
SBC
DEC
NEG
0
0
1
1
0-9
0-8
7-F
6-F
0
1
0
1
0-9
6-F
0-9
6-F
00
FA
A0
9A
0
0
1
1
ADD
A, r
Add contents of register r to the
Accumulator.
A
w
A
a
r
S: Set if negative result
Z: Set if zero result
H: Set if carry from bit 3
P/V: Set according to overflow
condition
N: Reset
C: Set if carry from bit 7
0
7
6
5
4
3
2
1
1
0
0
0
0
r
Timing:
M cyclesD1
T statesD4
Addressing Mode:
SourceDRegister
DestinationDImplied
ADC
A, r
Add contents of register r, plus the carry flag, to the Accu-
mulator.
A
w
A
a
r
a
CY
S: Set if negative result
Z: Set if zero result
H: Set if carry from bit 3
P/V: Set if result exceeds 2’s com-
plement range
N: Reset
C: Set if carry from bit 7
7
6
5
4
3
2
1
0
1
0
0
0
1
r
Timing:
M cyclesD1
T statesD4
Addressing Mode:
SourceDRegister
DestinationDImplied
SUB
r
Subtract the contents of register r from the Accumulator.
A
w
A
b
r
S: Set if result is negative
Z: Set if result is zero
H: Set if borrow from bit 4
P/V: Set if result exceeds 8-bit 2’s
complement range
N: Set
C: Set according to borrow
0
7
6
5
4
3
2
1
1
0
0
1
0
r
Timing:
M cyclesD1
T statesD4
Addressing Mode:
SourceDRegister
DestinationDImplied
SBC
A, r
Subtract contents of register r and the carry bit C from the
Accumulator.
A
w
A
b
r
b
CY
S: Set if result is negative
Z: Set if result is zero
H: Set if borrow from bit 4
P/V: Set if result exceeds 8-bit 2’s
complement range
N: Set
C: Set according to borrow
0
7
6
5
4
3
2
1
1
0
0
1
1
r
Timing:
M cyclesD1
T statesD4
Addressing Mode:
SourceDRegister
DestinationDImplied
AND
r
Logically AND the contents of the r register and the Accu-
mulator.
A
w
A
!
r
S: Set if result is negative
Z: Set if result is zero
H: Set
P/V: Set if result parity is even
N: Reset
C: Reset
36
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相關代理商/技術參數(shù)
參數(shù)描述
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