參數(shù)資料
型號: NSAM266SA
廠商: NATIONAL SEMICONDUCTOR CORP
元件分類: 數(shù)字信號處理
英文描述: 4 Mbit Uniform Sector, Serial Flash Memory
中文描述: 8-BIT, MIXED DSP
文件頁數(shù): 9/52頁
文件大?。?/td> 571K
代理商: NSAM266SA
1.0 Hardware
(Continued)
Consider
the
following
NM29A040’s blocks:
extensive
usage
of
all
the
1. Record 15 minutes of messages (until the memory is full).
2. Playback 15 minutes (all the recorded messages).
3. Delete all messages.
Assuming a NM29A040 device is used in this manner 24
times a day, its expected lifetime is:
Flash Lifetime
e
100,000/(24
*
365)
e
11.4 years
Thus the NM29A040 device will last for over ten years, even
when used for six hours of recording per day.
Note, that if an NM29A080 device is used, then, under the
same conditions, it will last for more than 20 years.
ROM Interface
IVS vocabularies can be stored in either serial flash and/or
ROM. The CompactSPEECH supports IVS ROM devices
through Expansion Memory. Up to 64 kbytes (64k x 8) of
Expansion Memory are supported directly. Nevertheless,
the CompactSPEECH uses bits of the on-chip port (PB) to
further extend the 64 kbytes address space up to
0.5 Mbytes address space.
ROM is connected to the CompactSPEECH using the data
bus, D(0:7), the address bus, A(0:15), the extended address
signals, EA(16:18), and Expansion Memory Chip Select,
EMCS, controls. The number of extended address pins to
use may vary, depending on the size and configuration of
the ROM.
Reading from Expansion Memory
An Expansion Memory read bus-cycle starts at T1, when the
data bus is in TRI-STATE
é
, and the address is driven on the
address bus. EMCS is asserted (cleared to 0) on a T2W1
cycle. This cycle is followed by three T2W cycles and one
T2 cycle. The CompactSPEECH samples data at the end of
the T2 cycle.
The transaction is terminated at T3, when EMCS becomes
inactive (set to 1). The address remains valid until T3 is
complete. A T3H cycle is added after the T3 cycle. The
address remains valid until the end of T3H.
1.3.6 Codec Interface
The CompactSPEECH provides an on-chip interface to a
serial codec. This interface supports codec operation in
long- or short-frame formats. The format is selected with the
CFG command.
The codec interface uses four signalsDCDIN, CDOUT,
CCLK and CFS0.
Data is transferred to the codec through the CDOUT pin.
Data is read from the codec through the CDIN pin.
Data transfer between the CompactSPEECH and the serial
codec starts by the CompactSPEECH asserting (setting to
1) the CFS0 frame synchronization signal. After one clock
cycle, the CompactSPEECH de-asserts (clears to 0) CFS0,
data from the CompactSPEECH is sent to the codec
through CDOUT, and simultaneously data from the codec is
sent to the CompactSPEECH through CDIN.
Short Frame Protocol
When short frame protocol is configured, eight data bits are
exchanged with each codec in each frame, i.e., CFS0 cycle.
Data transfer starts when CFS0 is set to 1 for one CCLK
cycle. The data is then transmitted, bit-by-bit, via the
CDOUT output pin. Concurrently, the received data is shift-
ed in via the CDIN input pin. Data is shifted one bit in each
CCLK cycle.
Figure 1-6 shows how the codec interface signals behave
when short frame protocol is configured.
Long Frame Protocol
When long frame protocol is configured, eight data bits are
exhanged with each codec, as with the short frame proto-
col. However, for the long frame protocol, data transfer
starts by setting CFS0 to 1 for eight CCLK cycles. Simulta-
neously, the data for the first codec is shifted out bit-by-bit,
via the CDOUT output pin, as in short frame protocol. Con-
currently, the received data is shifted in through the CDIN
input. The data is shifted one bit in each CCLK cycle.
Figure 1-7 shows how the codec interface signals behave
when long frame protocol is configured.
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