- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄363664 > NS16C2752 (National Semiconductor Corporation) Dual UART with 16-byte/64-byte FIFOs and up to 5 Mbit/s Data Rate PDF資料下載
參數(shù)資料
| 型號(hào)： | NS16C2752 |
| 廠商： | National Semiconductor Corporation |
| 英文描述： | Dual UART with 16-byte/64-byte FIFOs and up to 5 Mbit/s Data Rate |
| 中文描述： | 雙UART與16-byte/64-byte FIFO和高達(dá)5 Mbit / s的數(shù)據(jù)速率 |
| 文件頁數(shù)： | 5/43頁 |
| 文件大?。?/td> | 881K |
| 代理商： | NS16C2752 |
第1頁第2頁第3頁第4頁當(dāng)前第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁
5.0 Pin Descriptions
The NS16C2552/NS16C2752 pins are classified into the
following interface categories.
Bus Interface
Serial I/O Interface
Clock and Reset
Power supply and Ground pins
Serial channel number (1 or 2) is designated by a numerical
suffix after each pin name. If a numerical suffix (1 or 2) is not
associated with the pin name, the information applies to both
channels.
The I/O types are as follows:
Type: I
Type: O
Type: IO_Z
Input
Output
TRI-STATE I/O
5.1 PARALLEL BUS INTERFACE
Signal
Name
D7
D6
D5
D4
D3
D2
D1
D0
A2
A1
A0
Type
PLCC
Pin #
9
8
7
6
5
4
3
2
15
14
10
TQFP
Pin #
3
2
1
48
47
46
45
44
10
9
4
Description
IO_Z
Data Bus:
Data bus comprises eight TRI-STATE input/output lines. The bus provides
bidirectional communications between the UART and the CPU. Data, control words,
and status information are transferred via the D
7
-D
0
Data Bus.
I
Register Addresses:
Address signals connected to these 3 inputs select a DUART register for the CPU to
read from or write to during data transfer.
Table 1
shows the registers and their
addresses. Note that the state of the Divisor Latch Access Bit (DLAB), which is the
most significant bit of the Line Control Register, affects the selection of certain
DUART registers. The DLAB must be set high by the system software to access the
Baud Generator Divisor Latches and the Alternate Function Register.
Chip Select:
When CS is low, the chip is selected. This enables communication between the
DUART and the CPU. Valid chip select should stabilize according to the t
AW
parameter.
Channel Select:
CHSL directs the address and data information to the selected serial channel. (
Table
1
)
1 = channel 1 is selected.
0 = channel 2 is selected.
IO Read:
The register data is placed on the D0 - D7 on the falling edge of RD. The CPU can
read status information or data from the selected DUART register on the rising edge.
IO Write:
On the falling edge of WR, data is placed on the D0 - D7. On the rising edge, the data
is latched into the selected DUART register.
UART Receive-ready:
The receiver DMA signaling is available through this pin which
is a seperate pin on the TQFP package, while on the PLCC package it is available
through the MF pins (19, 35). When operating in the FIFO mode, the CPU selects
one of two types of DMA transfer via FCR[3]. When operating in the 16450 Mode,
only DMA mode 0 is available. Mode 0 supports single transfer DMA (and a transfer is
usually made between CPU bus cycles). Mode 1 supports multi-transfer DMA where
multiple transfers are made continuously until the Rx FIFO is empty. Details regarding
the active and inactive states of this signal are described in
Section 6.5 FIFO
CONTROL REGISTER (FCR)
and
Section 7.9 DMA OPERATION
.
CS
I
18
13
CHSL
I
16
11
RD
I
24
20
WR
I
20
15
RXRDY1
RXRDY2
O
N/A
31
8
N
www.national.com
5
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| NS16C2752TVA | Dual UART with 16-byte/64-byte FIFOs and up to 5 Mbit/s Data Rate |
| NS32203D | DIRECT MEMORY ACCESS CONTROLLER |
| NS32203N | DIRECT MEMORY ACCESS CONTROLLER |
| NS32382-10 | MEMORY MANAGEMENT UNITS |
| NS32382-15 | MEMORY MANAGEMENT UNITS |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| NS16C2752TVA | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:Dual UART with 16-byte/64-byte FIFOs and up to 5 Mbit/s Data Rate |
| NS16C2752TVA/NOPB | 功能描述:UART 接口集成電路 RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| NS16C2752TVAX/NOPB | 功能描述:UART 接口集成電路 Dual UART w/ 64-byte FIFO RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| NS16C2752TVS | 制造商:Texas Instruments 功能描述:UART 2-CH 64Byte FIFO 3.3V/5V 48-Pin TQFP |
| NS16C2752TVS/NOPB | 功能描述:UART 接口集成電路 RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。