參數(shù)資料
型號(hào): NDS356
廠商: Fairchild Semiconductor Corporation
英文描述: P-Channel Logic Level Enhancement Mode Field Effect Transistor
中文描述: P溝道增強(qiáng)模式的邏輯電平場(chǎng)效應(yīng)晶體管
文件頁(yè)數(shù): 3/6頁(yè)
文件大?。?/td> 78K
代理商: NDS356
Electrical Characteristics
(T
A
= 25°C unless otherwise noted)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS
I
S
I
SM
Maximum Continuous Source Current
-0.42
A
Maximum Pulsed Drain-Source Diode Forward Current
-10
A
V
SD
Notes:
1. R
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. R
θ
JC
is guaranteed by
design while R
θ
CA
is determined by the user's board design.
Drain-Source Diode Forward Voltage
V
GS
= 0 V, I
S
= -0.42
(Note 2)
-0.8
-1.2
V
Typical R
θ
JA
using the board layouts shown below on 4.5"x5" FR-4 PCB in a still air environment:
a. 250
o
C/W when mounted on a 0.02 in
2
pad of 2oz copper.
b. 270
o
C/W when mounted on a 0.001 in
2
pad of 2oz copper.
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300μs, Duty Cycle < 2.0%.
NDS356AP Rev.C
1
P
D
(
t
) =
T
J
T
A
R
θ
JA
(
t
)
=
T
J
T
A
R
θ
JC
+
R
θ
CA
(
t
)
=
I
D
2
(
t
) ×
R
DS
(
ON
)
@
T
J
1a
1b
相關(guān)PDF資料
PDF描述
NDS356P P-Channel Logic Level Enhancement Mode Field Effect Transistor(-1.1A,-20V,0.3Ω)(P溝道邏輯增強(qiáng)型MOS場(chǎng)效應(yīng)管(漏電流-1.1A, 漏源電壓-20V,導(dǎo)通電阻0.3Ω))
NDS7002 N-Channel Enhancement Mode Field Effect Transistor
NDS7002A N-Channel Enhancement Mode Field Effect Transistor(N溝道增強(qiáng)型場(chǎng)效應(yīng)管)
NDS8410A Single N-Channel Enhancement Mode Field Effect Transistor
NDS8410S Single N-Channel Enhancement Mode Field Effect Transistor
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