參數(shù)資料
型號(hào)： NCN6001DTBEVB
廠商： ON Semiconductor
文件頁數(shù)： 8/36頁
文件大?。?/td> 0K
描述： EVAL BOARD FOR NCN6001DTB
設(shè)計(jì)資源： NCN6001DTBEVB Gerber Files
NCN6001 Demo Brd Schematic
NCN6001DBEVB BOM
標(biāo)準(zhǔn)包裝： 1
主要目的： 接口，智能卡
嵌入式： 是，MCU，8 位
已用 IC / 零件： NCN6001
主要屬性： 與 ISO 7816-3，EMV，GIE-CB 兼容
次要屬性： 符合 GSM 規(guī)定
已供物品： 板
其它名稱： NCN6001DTBEVBOS
NCN6001
http://onsemi.com
16
POWER DOWN SEQUENCE
The NCN6001 provides an automatic Power Down
sequence, according to the ISO78163 specifications, and
the communication session terminates immediately. The
sequence is launched when the card is extracted, or when the
CRD_VCC voltage is overloaded as described by the
ISO/CEI 78163 sequence depicted hereafter:
ISO78163 sequence:
"Force RST to Low
"Force CLK to Low, unless it is already in this state
"Force C4 & C8 to Low
"Force CRD_IO to Low
"Shut Off the CRD_VCC supply
Since the internal digital filter is activated for any card
insertion or extraction, the physical power sequence will be
activated 50
ms (typical) after the card has been extracted. Of
course, such a delay does not exist when the MPU
intentionally launches the power down. Figure 7 shows the
oscillogram captured in the NCN6001 demo board.
The internal active pull down NMOS connected across
CRD_VCC and GND discharges the external reservoir
capacitor in 100
ms (typical), assuming Cout = 10 mF.
Figure 7. Typical Power Down Sequence
Typical delay between each signal is 500 ns
The internal active pull down NMOS connected across CRD_VCC and GND discharges the external reservoir capacitor in
100
ms (typical), assuming Cout = 10 mF.
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