參數(shù)資料
型號： MX98725
廠商： Electronic Theatre Controls, Inc.
英文描述： SINGLE CHIP FAST ETHERNET NIC CONTROLLER
中文描述： 單晶片快速以太網(wǎng)卡控制器
文件頁數(shù)： 20/33頁
文件大?。?/td> 177K
代理商： MX98725
20
P/N:PM0488
REV. 1.7, SEP. 15, 1998
MX98725
5.2.7 INTERRUPT MASK REGISTER ( CSR7 )
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
NIE-Normal interrupt Summary Enable
AIE-Abnormal Interrupt Summary Enable
ERIE-Early Receive Interrupt Enable
FBE-Fatal Bus Error Enable
LFE-Link Fail Enable
GPTE-General-Purpose Timer Enable
ETIE-Early Transmit Interrupt Enable
RWE-Receive Watchdog Enable
RSE-Receive Stopped Enable
RUE-Receive Buffer Unavailable Enable
RIE-Receive Interrupt Enable
UNE-Underflow Interrupt Enable
LPANCIE-Link Pass
/Nway Complete Interrupt Enable
TJE-Transmit Jabber Timeout Enable
TUE-Transmit Buffer Unavailable Enable
TSE-Transmit Stopped Enable
TIE-Transmit Interrupt Enable
LCE-Link Changed Enable
MPIE-Magic Packet Interrupt Enable
Field
28
27
16
15
Name
MPIE
LCE
NIE
AIE
Description
Magic Packet Interrupt Enable, enables CSR5<28>.
Link Changed Enable, enables CSR5<27>.
Normal Interrupt Summary Enable, set to enable CSR5<0>, CSR5<2>, CSR5<6>.
Abnormal Interrupt Summary enable, set to enbale CSR5<1>, CSR5<3>, CSR5<5>,
CSR5<7>, CSR5<8>, CSR5<9>, CSR5<11> and CSR5<13>.
Early Receive Interrupt Enable
Fatal Bus Error Enable, set together with with CSR7<15> enables CSR5<13>.
Link Fail Interrupt Enable, enables CSR5<12>
General_-Purpose Timer Enable, set together with CSr7<15> enables CSR5<11>.
Early Transmit Interrupt Enable, enables CSR5<10>
Receive Watchdog Timeout Enable, set together with CSR7<15> enables CSR5<9>.
Receive Stopped Enable, set together with CSR7<15> enables CSR5<8>.
Receive Buffer Unavailable Enable, set together with CSR7<15> enables CSR5<7>.
Receive Interrupt Enable, set together with CSR7<16> enables CSR5<6>.
Underflow Interrupt Enable, set together with CSR7<15> enables CSR5<5>.
Link Pass/Autonegotiation Completed Interrupt Enable
Transmit Jabber Timeout Enable, set together with CSR7<15> enables
Transmit Buffer Unavailable Enable, set together with CSR7<16> enables CSR5<2>.
Transmit Stop Enable, set together with CSR7<15> enables CSR5<1>.
Transmit Interrupt Enable, set together with CSR7<16> enables CSr5<0>.
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
ERIE
FBE
LFE
GPTE
ETIE
RWE
RSE
RUE
RIE
UNE
LPANCIE
TJE
TUE
TSE
TIE
CSR5<3>.
相關(guān)PDF資料
PDF描述
MX98905B The MX98905 is designed for easy implementation of CSMA/CD local area networks,
MX98905B IEEE 802.3, 10BASE5, 10BASE2 Controller and Integrated Bus Interface(IEEE 802.3, 10BASE5, 10BASE2控制器和集成總線接口)
MX98905BFC The MX98905 is designed for easy implementation of CSMA/CD local area networks,
MXA2312A Low Cost, +2,-2 g Dual Axis Accelerometer with Analog Outputs
MXA2500K Ultra Low Cost, 【1.0 g Dual Axis Accelerometer with Absolute Outputs
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MX98726 制造商:MCNIX 制造商全稱:Macronix International 功能描述:SINGLE CHIP 10/100 FAST ETHERNET CONTROLLER WITH uP INTERFACE
MX98726AEC 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Controller Miscellaneous - Datasheet Reference
MX98726EC 制造商:MCNIX 制造商全稱:Macronix International 功能描述:SINGLE CHIP 10/100 FAST ETHERNET CONTROLLER WITH uP INTERFACE
MX98727 制造商:未知廠家 制造商全稱:未知廠家 功能描述:SINGLE CHIP PCI/CARDBUS FAST ETHERNET CONTROLLER
MX98728 制造商:未知廠家 制造商全稱:未知廠家 功能描述:GMAC SINGLE CHIP 10/100 FAST ETHERNET CONTROLLER FOR GENERIC APPLICATION
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*