參數(shù)資料
型號: MX28F2100BTC-70
廠商: MACRONIX INTERNATIONAL CO LTD
元件分類: DRAM
英文描述: 2M-BIT [256K x 8/128K x 16] CMOS FLASH MEMORY
中文描述: 128K X 16 FLASH 12V PROM, 70 ns, PDSO48
封裝: 12 X 20 MM, PLASTIC, TSOP1-48
文件頁數(shù): 10/45頁
文件大?。?/td> 283K
代理商: MX28F2100BTC-70
10
MX28F2100B
P/N: PM0382
REV. 1.5, MAR. 24, 1998
Status Register Bit Definition
SR.7 = WRITE STATE MACHINE STATUS(WSMS)
1 = Ready
0 = Busy
SR.6 = ERASE-SUSPEND STATUS (ESS)
1 = Erase Suspended
0 = Erase in Progress/Completed
SR.5 = ERASE STATUS
1 = Error in Erase
0 = Successful Erasure
SR.4 = PROGRAM STATUS
1 = Error in Byte/Word Program
0 = Successful Byte/Word Program
SR.3 = Vpp STATUS
1 = Vpp Low Detect, Operation Abort
0 = Vpp OK
NOTE :
State machine bit must first be checked to determine
Byte/Word program or Block Erase completion, before
the Program or Erase Status bits are checked for success.
When Erase Suspend is issued, state machine halts
execution and sets both WSMS and ESS bits to "1," ESS
bit remains set to "1" until an Erase Resume command is
issued.
When this bit set to "1," state machine has applied the
maximum number of erase pulses to the device and is still
unable to successfully verify erasure.
When this bit is set to "1," state machine has attempted
but failed to program a byte or word.
The Vpp status bit, unlike an A/D converter, does not
provide continuous indication of Vpp level. The state
machine interrogates Vpp level only after the Byte Write
or Erase command sequences have been entered, and
informs the system if Vpp has not been switched on.
WSMS
ESS
ES
PS
VPPS
7
6
5
4
3
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