參數(shù)資料
型號： MTV412M
廠商： Electronic Theatre Controls, Inc.
英文描述： PT 2C 2#20 PIN PLUG
中文描述： 8051嵌入式控制器的ISP監(jiān)控128K閃存式
文件頁數(shù)： 18/26頁
文件大?。?/td> 255K
代理商： MTV412M
MYSON-CENTURY
TECHNOLOGY
MTV412M
(Rev 0.9)
INTFLG
(w) :
Revision 0.9 - 18 - April 2002
Interrupt flag. A interrupt event will set its individual flag, and, if the corresponding interrupt
enable bit is set, the 8051 INT1 source will be driven by a zero level. Software MUST clear
this register while serving the interrupt routine.
SlvBMI = 1
→
No action.
= 0
→
Clears SlvBMI flag.
STOPI = 1
→
No action.
= 0
→
Clears STOPI flag.
ReStaI = 1
→
No action.
= 0
→
Clears ReStaI flag.
WslvA1I = 1
→
No action.
= 0
→
Clears WslvA1I flag.
WslvA2I = 1
→
No action.
= 0
→
Clears WslvA2I flag.
MbufI = 1
→
No action.
= 0
→
Clears Master IIC bus interrupt flag (MbufI).
INTFLG
(r) :
Interrupt flag.
= 1
TXBI
RCBI = 1
→
Indicates the TXBBUF need a new data byte, cleared by writing TXBBUF.
→
Indicates the RCBBUF has received a new data byte, cleared by reading
RCBBUF.
→
Indicates the slave IIC address B match condition.
→
Indicates the slave IIC has detected a STOP condition for HSCL1/HSDA1 pins.
→
Indicates the slave IIC has detected a repeat START condition for HSCL1/HSDA1
pins.
→
Indicates the slave A1 IIC has detected a STOP condition of write mode.
→
Indicates the slave A2 IIC has detected a STOP condition of write mode.
→
Indicates a byte is sent/received to/from the master IIC bus.
SlvBMI = 1
STOPI = 1
ReStaI = 1
INTEN
(w) :
WslvA1I = 1
WslvA2I = 1
MbufI = 1
Interrupt enable.
ETXBI = 1
ERCBI = 1
ESlvBMI = 1
ESTOPI = 1
EReStaI = 1
EWSlvA1I = 1
→
Enables slave A1 IIC bus STOP of write mode interrupt.
EWSlvA2I = 1
→
Enables slave A2 IIC bus STOP of write mode interrupt.
EMbufI = 1
→
Enables Master IIC bus interrupt.
→
Enables TXBBUF interrupt.
→
Enables RCBBUF interrupt.
→
Enables slave address B match interrupt.
→
Enables IIC bus STOP interrupt.
→
Enables IIC bus repeat START interrupt.
Mbuf
(w) :
Master IIC data shift register, after START and before STOP condition, write this register
resumes MTV412M's transmission to the IIC bus.
Mbuf
(r) :
Master IIC data shift register, after START and before STOP condition, read this register
resumes MTV412M's reception from the IIC bus.
DDCCTRA1
(w) : DDC interface control register for HSCL1, HSDA1 pins.
DDC1en = 1
→
Enables DDC1 data transfer in DDC1 mode.
= 0
→
Disables DDC1 data transfer in DDC1 mode.
En128W = 1
→
The lower 128 bytes (00-7F) of DDCRAM1 can be written by IIC master.
= 0
→
The lower 128 bytes (00-7F) of DDCRAM1 cannot be written by IIC master.
En256W = 1
→
The higher 128 bytes (80-FF) of DDCRAM1 can be written by IIC master.
= 0
→
The higher 128 bytes (80-FF) of DDCRAM1 cannot be written by IIC master.
Only128 = 1
→
The SlaveA1 always accesses EDID data from the lower 128 bytes of DDCRAM1.
= 0
→
The SlaveA1 accesses EDID data from the whole 256 bytes DDCRAM1.
SlvA1bs1,SlvA1bs0 : Slave IIC block A1's slave address length.
相關(guān)PDF資料
PDF描述
MTV412MF128 8051 Embedded Monitor Controller 128K Flash Type with ISP
MTV412MS128 8051 Embedded Monitor Controller 128K Flash Type with ISP
MTV412MV128 8051 Embedded Monitor Controller 128K Flash Type with ISP
MU93-4001 SUPER BRIGHT LED LIGHT BAR MODULE
MU04-2101 SUPER BRIGHT LED LIGHT BAR MODULE
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MTV412MF128 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8051 Embedded Monitor Controller 128K Flash Type with ISP
MTV412MS128 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8051 Embedded Monitor Controller 128K Flash Type with ISP
MTV412MV128 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8051 Embedded Monitor Controller 128K Flash Type with ISP
MTV-50 制造商:MA-COM 制造商全稱:M/A-COM Technology Solutions, Inc. 功能描述:Two-Way Power Dividers, 1 - 100 MHz and 40 - 400 MHz
MTV50CD35 制造商:Mallory Sonalert Products Inc 功能描述:Molded Case Vertical-Mount Electrolytic Radial Leads Capacitor - 50uF 35dcV -10+100%
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*