參數(shù)資料
型號(hào)： MT93L04
廠商： Zarlink Semiconductor Inc.
英文描述： 128-Channel Voice Echo Canceller
中文描述： 128頻道語(yǔ)音回聲消除器
文件頁(yè)數(shù)： 39/56頁(yè)
文件大小： 903K
代理商： MT93L04
MT93L04
Data Sheet
39
Zarlink Semiconductor Inc.
FD
7-0
is defined as FD
7-0
x 8 taps. For example; if FD
7-0
= 5, then MU=2
-16
for the first 40 taps of the echo canceller FIR
filter. The valid range of FD
7-0
is: 0
≤
FD
7-0
≤
64 in normal mode and 0
≤
FD
7-0
≤
128 in extended-delay mode. The
default value of FD
7-0
is zero.
Flat Delay
:
This register defines the flat delay of the MU profile, (i.e., where the MU value is 2
-16
). The delay
SSC
2-0
Decay Step Size Control
:
This register controls the step size (SS) to be used during the exponential decay
of MU. The decay rate is defined as a decrease of MU by a factor of 2 every SS taps of the FIR filter, where SS = 4
x2
SSC
2-0
. For example; If SSC
2-0
= 4, then MU is reduced by a factor of 2 every 64 taps of the FIR filter. The default
value of SSC
2-0
is 04h.NS
7-0
Decay Step Number: This register defines the number of steps to be used for the
decay of MU where each step has a period of SS taps (see SSC
2-0
). The start of the exponential decay is defined
as:
Filter Length (512 or 1024) - [Decay Step Number (NS
7-0
) x Step Size (SS)] where SS = 4 x2
SSC
2-0
.
For example, if NS
7-0
=4 and SSC
2-0
=4, then the exponential decay start value is 512 - [NS
7-0
x SS] = 512 - [4 x
(4x2
4
)] = 256 taps for a filter length of 512 taps.
Bit
Name
Description
7-4
res
Reserved bits. Must always be set to zero for normal operation.
3
RingClr
When high, the instability detector is activated. When low, the instability detector is
disabled
2
PathClr
When high, the current echo channel estimate will be cleared and the echo canceller
will enter fast convergence mode upon detection of a path change. When low, the
echo canceller will keep the current path estimate but revert to fast convergence
mode upon detection of a path change. Note: this bit is ignored if PathDet is low.
1
PathDet
When high, the path change detector is activated. When low, the path change
detector is disabled.
0
res
Reserved bit. Must always be set to zero for normal operation.
Bit
Name
Description
7
0
Must be set to zero.
Echo Canceller A, Control Register A3
Echo Canceller B, Control Register B3
res
PathDet
PathClr
RingClr
res
res
res
res
7
6
5
4
3
2
1
0
Reset Value:
0A
H
.
Read/Write Address: 08
H
+ Base Address
Read/Write Address: 28
H
+ Base Address
Echo Canceller A, Control Register A4
Echo Canceller B, Control Register B4
res
res
res
res
SD
0
SD
1
SD
2
0
7
6
5
4
3
2
1
0
Reset Value:
50
H
.
Read/Write Address: 09
H
+ Base Address
Read/Write Address: 29
H
+ Base Address
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MT93L04A 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:128-Channel Voice Echo Canceller
MT93L04AG 制造商:Microsemi Corporation 功能描述:ECHO CANCELLER CHIP 128CH G.164/G.165/G.168/G.711 W/ TONE DE - Trays 制造商:MICROSEMI CONSUMER MEDICAL PRODUCT GROUP 功能描述:IC VOICE ECHO CANCEL 365MCMBGA
MT93L04AG2 制造商:Microsemi Corporation 功能描述:ECHO CANCELLER CHIP 128CH G.164/G.165/G.168/G.711 W/ TONE DE - Trays 制造商:MICROSEMI CONSUMER MEDICAL PRODUCT GROUP 功能描述:IC VOICE ECHO CANCEL 365MCMBGA 制造商:Microsemi Corporation 功能描述:IC VOICE ECHO CANCEL 365MCMBGA
MT93L16 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:AEC with Noise Reduction & Codecs for Digital Hands-Free Communication
MT93L16AF 制造商:Microsemi Corporation 功能描述:ECHO CANCELLER CHIP 2CH G.711 W/OUT TONE DETECTION 48TQFP - Rail/Tube
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