參數(shù)資料
型號(hào)： MT9300BV
廠商： ZARLINK SEMICONDUCTOR INC
元件分類： 數(shù)字傳輸電路
英文描述： Multi-Channel Voice Echo Canceller
中文描述： DATACOM, ISDN ECHO CANCELLER, PBGA208
封裝： 17 X 17 MM, 1.30 MM HEIGHT, MO-192, LBGA-208
文件頁(yè)數(shù)： 22/39頁(yè)
文件大?。?/td> 629K
代理商： MT9300BV
MT9300B
Data Sheet
22
Zarlink Semiconductor Inc.
Bit
Name
Description
7
res
Reserved bit.
6
TD
Logic high indicates the presence of a 2100 Hz tone.
5
DTDet
Logic high indicates the presence of a double-talk condition.
4
res
Reserved bit.
3
res
Reserved bit.
2
res
Reserved bit.
1
TDG
Tone detection status bit gated with the AutoTD bit.
Logic high indicates that AutoTD has been enabled and the tone detector has
detected the presence of a 2100 Hz tone.
0
NB
Logic high indicates the presence of a narrow-band signal on Rin.
Bit
Name
Description
7
res
Reserved bit.
6
TD
Logic high indicates the presence of a 2100 Hz tone.
5
DTDet
Logic high indicates the presence of a double-talk condition.
4
res
Reserved bit.
3
res
Reserved bit.
2
res
Reserved bit.
1
TDG
Tone detection status bit gated with the AutoTD bit.
Logic high indicates that AutoTD has been enabled and the tone detector has
detected the presence of a 2100 Hz tone.
0
NB
Logic high indicates the presence of a narrow-band signal on Rin.
Echo Canceller A, Status Register
Echo Canceller B, Status Register
NB
TDG
res
res
res
DTDet
TD
res
7
6
5
4
3
2
1
0
Reset Value:
00
H
Read Address:
Read Address:
02
H
+ Base Address
22
H
+ Base Address
Echo Canceller A, Status Register
Echo Canceller B, Status Register
NB
TDG
res
res
res
DTDet
TD
res
7
6
5
4
3
2
1
0
Reset Value:
00
H
Read Address:
Read Address:
02
H
+ Base Address
22
H
+ Base Address
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參數(shù)描述
MT9315 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:CMOS Acoustic Echo Canceller
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