參數(shù)資料
型號: MT9160AN1
廠商: Zarlink Semiconductor Inc.
元件分類: Codec
英文描述: 3 Volt Multi-Featured Codec (MFC)
中文描述: 3伏多精選編解碼器(MFC)中
文件頁數(shù): 25/33頁
文件大?。?/td> 527K
代理商: MT9160AN1
MT91L60/61
Data Sheet
25
Zarlink Semiconductor Inc.
Timing is over recommended temperature range & recommended power supply voltages.
Typical figures are at 25
°
C and are for design aid only: not guaranteed and not subject to production testing.
* Note: All conditions
data-data, data-HiZ, HiZ-data.
Figure 11 - ST-BUS Timing Diagram
AC Electrical Characteristics
- ST-BUS Timing (See Figure 11)
Characteristics
Sym.
Min.
Typ.
Max.
Units
Test Conditions
1
C4i Clock Period
t
C4P
t
C4H
t
C4L
t
T
t
F0iS
t
F0iH
t
F0odS
244
ns
2
C4i Clock High period
122
ns
3
C4i Clock Low period
122
ns
4
C4i Clock Transition Time
20
ns
5
F0i Frame Pulse Setup Time
50
ns
6
F0i Frame Pulse Hold Time
50
ns
7
Delayed Frame Pulse delay
after C4i rising
55
ns
8
Delayed Frame Pulse hold time
from C4i rising
t
F0odH
50
ns
9
DSTo Delay
t
DSToD
t
DSTiS
t
DSTiH
125
ns
C
L
= 30 pF, 1 k
load.*
10
DSTi Setup Time
20
ns
11
DSTi Hold Time
50
ns
DSTo
DSTi
70%
30%
70%
30%
70%
30%
70%
30%
NOTE:
Levels refer to%V
DD
t
T
t
T
t
C4L
t
C4H
t
C4P
1 bit cell
t
DSTiS
t
DSTiH
t
F0iS
t
F0iH
t
T
t
DSToD
t
T
C4i
F0i
70%
30%
F0od
t
F0odS
t
F0odH
64 Clock Periods
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