參數(shù)資料
型號(hào)： MT9160AN1
廠商： Zarlink Semiconductor Inc.
元件分類： Codec
英文描述： 3 Volt Multi-Featured Codec (MFC)
中文描述： 3伏多精選編解碼器（MFC）中
文件頁(yè)數(shù)： 23/33頁(yè)
文件大?。?/td> 527K
代理商： MT9160AN1
MT91L60/61
Data Sheet
23
Zarlink Semiconductor Inc.
AC Electrical Characteristics are over recommended temperature range & recommended power supply voltages.
Typical figures are at 25
°
C and are for design aid only: not guaranteed and not subject to production testing.
* Note: RxINC, refer to Control Register 1, address 00h.
AC Characteristics
for D/A (Receive) Path
- 0 dBm0 = A
Lo3.17
- 3.17 dB
=
1.027 V
rms
for
μ
-Law and
0 dBm0 = A
Lo3.14
- 3.14 dB
=
1.067 V
rms
for A-Law, at the Codec. (V
Ref
= 0.4 V and V
Bias
=1.5 volts.)
Characteristics
Sym.
Min.
Typ.
Max.
Units
Test Conditions
1
Analog output at the Codec full
scale
A
Lo3.17
A
Lo3.14
G
AR1
G
AR2
G
AR3
G
AR4
4.183
4.331
Vp-p
Vp-p
μ
-Law
A-Law
2
Absolute half-channel gain.
Din to HSPKR±
-0.6
-6.6
-6.6
-12.6
0
-6
-6
-12
0.6
-5.4
-5.4
-11.4
dB
dB
dB
dB
DrGain=0, RxINC =1*
DrGain=0, RxINC =0*
DrGain=1, RxINC =1*
DrGain=1, RxINC =0*
@ 1020 Hz
Tolerance at all other receive
filter settings
(-1 to -7 dB)
-0.2
±0.1
+0.2
dB
3
Gain tracking vs. input level
ITU-T G.714 Method 2
G
TR
-0.3
-0.6
-1.6
0.3
0.6
1.6
dB
dB
dB
3 to -40 dBm0
-40 to -50 dBm0
-50 to -55 dBm0
4
Signal to total distortion vs. input
level.
ITU-T G.714 Method 2
G
QR
35
29
24
dB
dB
dB
0 to -30 dBm0
-40 dBm0
-45 dBm0
5
Receive Idle Channel Noise
N
CR
N
PR
G
RR
11.5
-80
14
-77
dBrnC0
dBm0p
μ
-Law
A-Law
6
Gain relative to gain at 1020 Hz
200 Hz
300 - 3000 Hz
3000 - 3300 Hz
3300 Hz
3400 Hz
4000 Hz
4600 Hz
>4600 Hz
-0.25
-0.90
-0.9
-0.9
-0.1
-0.5
-23
-41
0.25
0.25
0.25
0.25
0.25
-12.5
-25
-25
dB
dB
dB
dB
dB
dB
dB
dB
7
Absolute Delay
D
AR
D
DR
240
ms
at frequency of min. delay
8
Group Delay relative to D
AR
750
380
130
750
ms
ms
ms
ms
500-600 Hz
600 - 1000 Hz
1000 - 2600 Hz
2600 - 2800 Hz
9
Crosstalk
D/A to A/D
A/D to D/A
CT
RT
CT
TR
-90
-90
-74
-80
dB
dB
ITU-T
G.714.16
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