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參數(shù)資料
| 型號： | MT90810 |
| 廠商： | Mitel Networks Corporation |
| 英文描述： | Flexible MVIP(Multi-Vendor Integration Protocol) Interface Circuit(彈性MVIP接口電路) |
| 中文描述： | 柔性MVIP（多廠商集成協(xié)議）接口電路（彈性MVIP接口電路） |
| 文件頁數(shù)： | 20/33頁 |
| 文件大?。?/td> | 176K |
| 代理商： | MT90810 |
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MT90810
Preliminary Information
2-188
Bit
Name
Description
7:4
3
RESERVED
DC
Direction Control.
controls the direction of the MVIP DSi/DSo channel pair.
When DC is set, DSi is the input channel and DSo is the output channel. When DC
is clear the direction is reversed.
Message Channel.
This bit, when set, will send the eight bits of connection memory
low directly out the corresponding output channel and stream. When the bit is
cleared, the contents of the programmed location in connection memory low act as
an address for the data memory and so determine the source of the corresponding
output channels and stream.
Output Enable.
This bit, when set, enables the output drivers on a per-channel
basis. This allows individual channels on individual streams to be made
high-impedance, permitting the construction of switch matrices. When this bit is
cleared, the drivers are disable.
Source Channel Address Bit 8.
This bit, together with bits CAB0-7 in connection
memory low, is used to select one of 384 different source input channels for the
connection.
Table 21 - Connection Memory High Bits for MVIP channels
2
MC
1
OE
0
CAB8
Bit
Name
Description
7-4
3
RESERVED
CSTo
CSTo.
The inverted value of this bit is output on the CSTo pin and is available for
general purpose system timing functions. The CSTo bit for each of the local output
channels is multiplexed onto the CSTo pin as illustrated below:
2
MC
Message Channel.
This bit, when set, will send the eight bits of connection memory
low directly out the corresponding output channel and stream. When the bit is cleared,
the contents of the programmed location in connection memory low act as an address
for the data memory and so determine the source of the corresponding output channels
and stream.
Channel Enable.
If the DMA_EN bit in the Control/Status register is set, then this bit
flags the control logic to perform a bidirectional DMA transfer for this input/output
channel pair. When the bit is clear, the DMA transfer for this channel pair is disabled.
If DMA operations are not enabled then this bit must be cleared.
Source Channel Address Bit 8.
This bit, together with bits CAB0-7 in connection
memory low, is used to select one of 384 different source input channels for the
connection.
Table 22 - Connection Memory High Bits for Local channels
1
CE
0
CAB8
LD2:0 LD3:0
LD0:0 LD1:0
LD2:1 LD3:1
LD0:1 LD1:1
LD2:2 LD3:2
LD0:2 LD1:2
LD0:3
C4
F0
CSTo output timing
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
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| MT90812AL1 | 制造商:Microsemi Corporation 功能描述:SWIT FABRIC 192 X 192 16.384MBPS 5V 64MQFP - Trays 制造商:Microsemi Corporation 功能描述:PB FREE INTEGRATED DIGITAL SWITCH |
| MT90812AP | 制造商:MITEL 制造商全稱:Mitel Networks Corporation 功能描述:Integrated Digital Switch (IDX) |
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