參數(shù)資料
型號(hào)： MT90401AB1
廠商： ZARLINK SEMICONDUCTOR INC
元件分類： 數(shù)字傳輸電路
英文描述： SONET/SDH System Synchronizer
中文描述： ATM/SONET/SDH SUPPORT CIRCUIT, PQFP80
封裝： 14 X 14 MM, 1.40 MM HEIGHT, LEAD FREE, MS-026BEC, LQFP-80
文件頁(yè)數(shù)： 20/38頁(yè)
文件大小： 650K
代理商： MT90401AB1
MT90401
Data Sheet
20
Zarlink Semiconductor Inc.
Using the above method, the jitter attenuation can be calculated for all combinations of inputs and outputs based on
the four jitter transfer functions provided.
Since intrinsic jitter generation is always present, jitter attenuation will appear to be lower for small input jitter
signals than for large ones. Consequently, accurate jitter transfer function measurements are usually made with
large input jitter signals (e.g., 75% of the specified maximum jitter tolerance).
Description
State
Input Controls
Freerun
Normal
(PRI)
Normal
(SEC)
Holdover
(PRI)
Holdover
(SEC)
MS2
MS1
RSEL
PCCi
S0
S1
S2
S1H
S2H
0
0
0
0
S1
-
S1 MTIE
S1
S1 MTIE
0
0
0
1
S1
-
S1 MTIE
S1 MTIE
S1 MTIE
0
0
1
X
S2
S2 MTIE
-
S2 MTIE
S2 MTIE
0
1
0
X
/
S1H
/
/
0
1
1
X
/
S2H
S2H
/
-
1
0
X
X
-
S0
S0
S0
S0
Legend:
- No Change
/ Not Valid
MTIE State change occurs with TIE Corrector Circuit
Refer to Control State Diagram for state changes to and from Auto-Holdover State
Table 4 - Control State Table
OutputT1
InputT1
A
–
20
------
×
10
20
=
OutputT1
20
–
×
10
2.5UI T1
)
=
=
OutputE1
OutputT1
488ns
(
)
)
-644ns
×
3.3UI T1
)
=
=
OutputE1
OutputT1
1UIE1
(
)
)
-1UIT1
×
=
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