參數(shù)資料
型號: MT46H256M32L2JV-75IT:A
元件分類: DRAM
英文描述: 256M X 32 DDR DRAM, 6 ns, PBGA168
封裝: 12 X 12 MM, GREEN, PLASTIC, VFBGA-168
文件頁數(shù): 91/106頁
文件大?。?/td> 3431K
Figure 46: Random WRITE Cycles
tDQSS (NOM)
CK
CK#
Command
WRITE1,2
NOP
Address
Bank,
Col b
Bank,
Col x
Bank,
Col n
Bank,
Col g
Bank,
Col a
T0
T1
T2
T3
T2n
T4
T5
T4n
T1n
T3n
T5n
DQ3,4
DQS
DM
Don’t Care
Transitioning Data
DIN
b’
DIN
x
DIN
x’
DIN
b
DIN
n’
DIN
a
DIN
a’
DIN
g
DIN
g’
DIN
n
WRITE1,2
Notes: 1. Each WRITE command can be to any bank.
2. Programmed BL = 2, 4, 8, or 16 in cases shown.
3. DINb (or x, n, a, g) = data-in for column b (or x, n, a, g).
4. b' (or x, n, a, g) = the next data-in following DINb (x, n, a, g) according to the program-
med burst order.
2Gb: x16, x32 Mobile LPDDR SDRAM
WRITE Operation
PDF: 09005aef83a73286
2gb_ddr_mobile_sdram_t69m.pdf - Rev. M 11/10 EN
85
Micron Technology, Inc. reserves the right to change products or specifications without notice.
2009 Micron Technology, Inc. All rights reserved.
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