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參數(shù)資料
| 型號： | MSM6542-03GS-VK |
| 廠商： | OKI ELECTRIC INDUSTRY CO LTD |
| 元件分類： | 時鐘/數(shù)據(jù)恢復(fù)及定時提取 |
| 英文描述： | 0 TIMER(S), REAL TIME CLOCK, PDSO24 |
| 封裝： | 0.430 INCH, PLASTIC, SOP-24 |
| 文件頁數(shù)： | 7/54頁 |
| 文件大?。?/td> | 406K |
| 代理商： | MSM6542-03GS-VK |
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Semiconductor
MSM6542-01/02/03
82
30-sec ADJ (30-seconds Adjustment)
When this input pin goes high, 30-second adjustment is performed on the rising edge. When
not used, connect to ground.
STOP/START
This input pin can be used as an integrating clock. When the pin is high, clocking at frequencies
lower than 4096 Hz stops. When the pin goes low, clocking is resumed.
The HD/SFT bit of the C
E' register specifies whether the stop/start function is implemented by
hardware or software.
When not used, connect to ground. For more information, see the description of "C
F register"
and "C
E' register" in "EXPLANATION OF REGISTERS."
STOP
STOP bit of
the CF register
HD/SFT bit of
the CE' register
STOP/START
START
Equivalent circuit of the STOP/START pin
Inside of the MSM6542
68/80
This input pin selects which CPU this IC is to be connected. To connect the IC to the 68-based
CPU, leave the pin at V
DD. To connect the IC to the 80-based CPU, leave the pin at the ground
level.
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