參數(shù)資料
型號(hào): MSM6542-03GS-VK
廠商: OKI ELECTRIC INDUSTRY CO LTD
元件分類: 時(shí)鐘/數(shù)據(jù)恢復(fù)及定時(shí)提取
英文描述: 0 TIMER(S), REAL TIME CLOCK, PDSO24
封裝: 0.430 INCH, PLASTIC, SOP-24
文件頁數(shù): 36/54頁
文件大?。?/td> 406K
代理商: MSM6542-03GS-VK
Semiconductor
MSM6542-01/02/03
108
[Temporarily canceling DP = 1 in a system for which DP is set at 1]
Idling
Read C ' register
E
DP = 0?
Rewrite individual
registers
Idling
DP = 1
* 2
* 3
* 1
* 2
N
* 3
N
Y
DP
0
DP
1
OR
Read CE' register
Idling for at least 11ms
Check that DP is 0
Rewrite individual
registers
Idling
* 1
DP
1
DP
0
Y
*1
Time until the DP bit becomes 0 under assumption that
oscillation is in progress.
*2
See "Rewriting individual register."
*3
Writing 1 in it is inhibited for 62
s after the DP bit is set
at 0. This idling is provided to make the DP bit wait to be
set at 1.
*1
Processing by other IC or wait time to prevent unneces-
sary readouts which occur frequently. A measure is 1 ms.
*2
See "Rewriting individual register."
*3
Wait time to prevent unnecessary readouts which occur
frequently. A measrue is 10
s.
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