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參數(shù)資料
| 型號： | MSM6542-03GS-VK |
| 廠商： | OKI ELECTRIC INDUSTRY CO LTD |
| 元件分類： | 時鐘/數(shù)據(jù)恢復(fù)及定時提取 |
| 英文描述： | 0 TIMER(S), REAL TIME CLOCK, PDSO24 |
| 封裝： | 0.430 INCH, PLASTIC, SOP-24 |
| 文件頁數(shù)： | 27/54頁 |
| 文件大小： | 406K |
| 代理商： | MSM6542-03GS-VK |
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Semiconductor
MSM6542-01/02/03
100
Oscillation frequency adjustment
[For the MSM6542-01/02]
18
17
16
3
2
1
INTERRUPT
OUT
VDD
XT
Screwdriver used
for adjustment
Eye
VDD
3.3 ~ 10K
Frequency
counter
Turn on power
CF
(1, 0, 0, 0)
←
Read C
register
C'
CE' ← (X, X, X, 0)
Read CE' register
DP = 0 ?
N
Y
*1
CD' ← (0, CY2, CY1, CY0)
CF ← (0, 0, 0, 0)
CE ← (0, 0, 0, 0)
CD ← (0, 1, 1, 0)
Read CE register
*2
To the next page
Banks are switched
X for (D3, D2, D1, D0) is a Don't Care bit
Dummy read to clear the test bits
Procedure for canceling data protection
Set a frequency of the signal to be output from pin 1.
Examples 64 Hz: (0 0 1 0) (duty cycle: 1/2)
1 Hz: (0 1 0 1) (duty cycle: 1/8192)
Banks are switched. The stop bit is cleared.
The reset bit is cleared
Preparation for a carry (oscillation).
When an alarm occurs, a carry is inhibited.
Dummy read to clear the IRQ FLAG bit
1
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| MSM6542-03RS | 0 TIMER(S), REAL TIME CLOCK, PDIP24 |
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