- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄45388 > MSC8256TVT800B (FREESCALE SEMICONDUCTOR INC) 0-BIT, OTHER DSP, PBGA783 PDF資料下載
參數(shù)資料
| 型號： | MSC8256TVT800B |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類： | 數(shù)字信號處理 |
| 英文描述： | 0-BIT, OTHER DSP, PBGA783 |
| 封裝： | 29 X 29 MM, LEAD FREE, PLASTIC, FCBGA-783 |
| 文件頁數(shù)： | 49/68頁 |
| 文件大?。?/td> | 910K |
| 代理商： | MSC8256TVT800B |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁當(dāng)前第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁
Hardware Design Considerations
MSC8256 Six-Core Digital Signal Processor Data Sheet, Rev. 3
Freescale Semiconductor
53
3
Hardware Design Considerations
The following sections discuss areas to consider when the MSC8256 device is designed into a system.
3.1
Power Supply Ramp-Up Sequence
The following subsections describe the required device initialization sequence.
3.1.1
Clock, Reset, and Supply Coordination
Starting the device requires coordination between several inputs including: clock, reset, and power supplies. Follow this
guidelines when starting up an MSC8256 device:
PORESET and TRST must be asserted externally for the duration of the supply ramp-up, using the VDDIO supply.
TRST deassertion does not have to be synchronized with PORESET deassertion. However, TRST must be deasserted
before normal operation begins to ensure correct functionality of the device.
CLKIN should toggle at least 32 cycles before PORESET deassertion to guarantee correct device operation. The 32
cycles should only be counted from the time after VDDIO reaches its nominal value (see timing 1 in Figure 33).
CLKIN should either be stable low during ramp-up of VDDIO supply (and start its swings after ramp-up) or should
swing within VDDIO range during VDDIO ramp-up, so its amplitude grows as VDDIO grows during ramp-up.
Figure 33 shows a sequence in which VDDIO ramps-up after VDD and CLKIN begins to toggle with the raise of VDDIO supply.
Note:
For details on power-on reset flow and duration, see the Reset chapter in the MSC8256 Reference Manual.
Figure 33. Supply Ramp-Up Sequence with VDD Ramping Before VDDIO and CLKIN Starting With VDDIO
Vo
lt
a
g
e
Time
VDDIO Nominal
PORESET/TRST asserted
VDD Nominal
CLKIN starts toggling
VDD applied
PORESET deasserted
1
VDDIO applied
VDDIO = Nominal
VDD = Nominal
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MSC8256SVT1000B | 0-BIT, OTHER DSP, PBGA783 |
| MSM5547RS | 0 TIMER(S), REAL TIME CLOCK, PDIP42 |
| MSM58321RS | 0 TIMER(S), REAL TIME CLOCK, PDIP16 |
| MSM6052GS | 4-BIT, MROM, MICROCONTROLLER, PQFP44 |
| MSM6242BGS | 1 TIMER(S), REAL TIME CLOCK, PDSO24 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MSC83301 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:RF & MICROWAVE TRANSISTORS GENERAL PURPOSE AMPLIFIER APPLICATIONS |
| MSC83303 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:RF & MICROWAVE TRANSISTORS GENERAL PURPOSE AMPLIFIER APPLICATIONS |
| MSC83305 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:RF & MICROWAVE TRANSISTORS GENERAL PURPOSE AMPLIFIER APPLICATIONS |
| MSC85623 | 制造商:ASI 制造商全稱:ASI 功能描述:NPN RF TRANSISTOR |
| MSC8W38T15-L6 | 功能描述:電纜束帶 MS Strapping, 316 SS, Nylon FC, .38" (9. RoHS:否 制造商:Phoenix Contact 產(chǎn)品:Cable Tie Mounts 類型:Adhesive 顏色:Black 材料:Acrylonitrile Butadiene Styrene (ABS) 長度:19 mm 寬度:19 mm 抗拉強度: |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。