![](http://datasheet.mmic.net.cn/100000/IF180C52TXXX-20R_datasheet_3493957/IF180C52TXXX-20R_381.png)
381
32099I–01/2012
AT32UC3L016/32/64
PARDIS=0: During header transmission, the parity bits are computed and in the shift register
they replace bits six and seven from IDCHR. During header reception, the parity bits are
checked and can generate a LIN Identifier Parity Error (see
Section 19.6.6). Bits six and
seven in IDCHR read as zero when receiving.
PARDIS=1: During header transmission, all the bits in IDCHR are sent on the bus. During
header reception, all the bits in IDCHR are updated with the received Identifier.
19.6.5.9
Node Action
After an identifier transaction, a LIN response mode has to be selected. This is done in the Node
Action field (LINMR.NACT). Below are some response modes exemplified in a small LIN cluster:
Response, from master to slave1:
Master: NACT=PUBLISH
Slave1: NACT=SUBSCRIBE
Slave2: NACT=IGNORE
Response, from slave1 to master:
Master: NACT=SUBSCRIBE
Slave1: NACT=PUBLISH
Slave2: NACT=IGNORE
Response, from slave1 to slave2:
Master: NACT=IGNORE
Slave1: NACT=PUBLISH
Slave2: NACT=SUBSCRIBE
19.6.5.10
LIN Response Data Length
The response data length is the number of data fields (bytes), excluding the checksum.
Figure 19-25. Response Data Length
The response data length can be configured, either by the user, or automatically by bits 4 and 5
in the Identifier (IDCHR), in accordance to LIN 1.1. The user selects mode by writing to the Data
Length Mode bit (LINMR.DML):
DLM=0: the response data length is configured by the user by writing to the 8-bit Data Length
Control field (LINMR.DLC). The response data length equals DLC + 1 bytes.
User configuration: 1 - 256 data fields (DLC+1)
Identifier configuration: 2/4/8 data fields
Sync
Break
Sync
Field
Identifier
Field
Checksum
Field
Data
Field
Data
Field
Data
Field
Data
Field