參數(shù)資料
型號(hào): MPC97R73FA
廠商: MOTOROLA INC
元件分類: 時(shí)鐘及定時(shí)
英文描述: PLL BASED CLOCK DRIVER, 12 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP52
封裝: LQFP-52
文件頁(yè)數(shù): 18/20頁(yè)
文件大?。?/td> 252K
代理商: MPC97R73FA
MPC97R73
TIMING SOLUTIONS
7
MOTOROLA
Table 11: DC CHARACTERISTICS (VCC = 2.5V ± 5%, TA = 0°C to 85°C)
Symbol
Characteristics
Min
Typ
Max
Unit
Condition
VCC_PLL
PLL Supply Voltage
2.325
VCC
V
LVCMOS
VIH
Input High Voltage
1.7
VCC + 0.3
V
LVCMOS
VIL
Input Low Voltage
–0.3
0.7
V
LVCMOS
VPP
Peak–to–peak Input Voltage PCLK, PCLK
250
mV
LVPECL
VCMRa
Common Mode Range
PCLK, PCLK
1.0
VCC – 0.6
V
LVPECL
VOH
Output High Voltage
1.8
V
IOH=-15 mAb
VOL
Output Low Voltage
0.6
V
IOL= 15 mA
ZOUT
Output Impedance
17 - 20
W
IIN
Input Current
±200
A
VIN = VCC or GND
ICC_PLL
Maximum PLL Supply Current
2.0
5.0
mA
VCC_PLL Pin
ICC
Maximum Quiescent Supply Current
1.0
mA
All VCC Pins
a.
VCMR (DC) is the crosspoint of the differential input signal. Functional operation is obtained when the crosspoint is within the VCMR range
and the input swing lies within the VPP (DC) specification.
b.
The MPC97R73 is capable of driving 50
transmission lines on the incident edge. Each output drives one 50 parallel terminated transmission
line to a termination voltage of VTT. Alternatively, the device drives up to two 50 series terminated transmission lines per output.
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