參數(shù)資料
型號(hào): MPC8308CVMAFD
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 32-BIT, 266 MHz, MICROPROCESSOR, PBGA473
封裝: 19 X 19 MM, 0.80 MM PITCH, 1.39 MM HEIGHT, LEAD FREE, MAPBGA-473
文件頁(yè)數(shù): 83/88頁(yè)
文件大?。?/td> 2550K
代理商: MPC8308CVMAFD
MPC8308 PowerQUICC II Pro Processor Hardware Specification, Rev. 1
84
Freescale Semiconductor
System Design Information
Figure 55. Driver Impedance Measurement
The value of this resistance and the strength of the driver’s current source can be found by making two
measurements. First, the output voltage is measured while driving logic 1 without an external differential
termination resistor. The measured voltage is V1 = Rsource × Isource. Second, the output voltage is measured
while driving logic 1 with an external precision differential termination resistor of value Rterm. The
measured voltage is V2 =(1/(1/R1 +1/R2)) × Isource. Solving for the output impedance gives Rsource =
Rterm × (V1/V2 – 1). The drive current is then Isource =V1/Rsource.
Table 60 summarizes the signal impedance targets. The driver impedance are targeted at minimum VDD,
nominal NVDD, 105°C.
23.6
Configuration Pin Muxing
The device provides the user with power-on configuration options that can be set through the use of
external pull-up or pull-down resistors of 4.7 K
Ω on certain output pins (see customer-visible
configuration pins). These pins are generally used as output-only pins in normal operation.
While PORESET is asserted, these pins are treated as inputs. The value presented on these pins while
PORESET is asserted is latched when PORESET deasserts, at which time the input receiver is disabled
and the I/O circuit takes on its normal function. Careful board layout with stubless connections to these
pull-up/pull-down resistors coupled with the large value of the pull-up/pull-down resistor should minimize
the disruption of signal quality or speed for output pins thus configured.
Table 60. Impedance Characteristics
Impedance
Local Bus, Ethernet, DUART, Control,
Configuration, Power Management
DDR DRAM
Symbol
Unit
RN
42 Target
20 Target
Z0
Ω
RP
42 Target
20 Target
Z0
Ω
Note: Nominal supply voltages. See Table 2, Tj = 105°C.
NVDD
VSS
RP
RN
Pad
Data
SW1
SW2
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