參數(shù)資料
型號(hào): MPC755BRX300LX
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 32-BIT, 300 MHz, RISC PROCESSOR, CBGA360
封裝: 25 X 25 MM, 3.20 MM HEIGHT, 1.27 MM PITCH, CERAMIC, BGA-360
文件頁(yè)數(shù): 23/48頁(yè)
文件大小: 1265K
代理商: MPC755BRX300LX
MPC755 RISC Microprocessor Hardware Specifications
3
Features
1.2 Features
This section summarizes features of the MPC755 implementation of the PowerPC architecture. Major
features of the MPC755 are as follows:
Branch processing unit
— Four instructions fetched per clock
— One branch processed per cycle (plus resolving two speculations)
— Up to one speculative stream in execution, one additional speculative stream in fetch
— 512-entry branch history table (BHT) for dynamic prediction
— 64-entry, 4-way set associative Branch Target Instruction Cache (BTIC) for eliminating branch
delay slots
Dispatch unit
— Full hardware detection of dependencies (resolved in the execution units)
— Dispatch two instructions to six independent units (system, branch, load/store, fixed-point
unit 1, fixed-point unit 2, floating-point)
— Serialization control (predispatch, postdispatch, execution serialization)
Decode
— Register file access
— Forwarding control
— Partial instruction decode
Completion
— 6-entry completion buffer
— Instruction tracking and peak completion of two instructions per cycle
— Completion of instructions in program order while supporting out-of-order instruction
execution, completion serialization and all instruction flow changes
Fixed Point Units (FXUs) that share 32 GPRs for integer operands
— Fixed Point Unit 1 (FXU1)—multiply, divide, shift, rotate, arithmetic, logical
— Fixed Point Unit 2 (FXU2)—shift, rotate, arithmetic, logical
— Single-cycle arithmetic, shifts, rotates, logical
— Multiply and divide support (multi-cycle)
— Early out multiply
Floating-point unit and a 32-entry FPR file
— Support for IEEE-754 standard single- and double-precision floating point arithmetic
— Hardware support for divide
— Hardware support for denormalized numbers
— Single-entry reservation station
— Supports non-IEEE mode for time-critical operations
— 3-cycle latency, 1-cycle throughput, single-precision multiply-add
— 3-cycle latency, 1-cycle throughput, double-precision add
— 4-cycle latency, 2-cycle throughput, double-precision multiply-add
相關(guān)PDF資料
PDF描述
MPC745BPX400LX 32-BIT, 400 MHz, RISC PROCESSOR, PBGA255
MPC755BPX300LX 32-BIT, 300 MHz, RISC PROCESSOR, PBGA360
MPC755BRX400LX 32-BIT, 400 MHz, RISC PROCESSOR, CBGA360
MPC755BRX450LE 32-BIT, 450 MHz, RISC PROCESSOR, CBGA360
MPC755CPX400 32-BIT, 400 MHz, RISC PROCESSOR, PBGA360
相關(guān)代理商/技術(shù)參數(shù)
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