參數(shù)資料
型號: MPC755BRX300LX
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 32-BIT, 300 MHz, RISC PROCESSOR, CBGA360
封裝: 25 X 25 MM, 3.20 MM HEIGHT, 1.27 MM PITCH, CERAMIC, BGA-360
文件頁數(shù): 19/48頁
文件大?。?/td> 1265K
代理商: MPC755BRX300LX
26
MPC755 RISC Microprocessor Hardware Specifications
Pinout Listings
Table 15 provides the pinout listing for the MPC755, 360 PBGA and CBGA packages.
TT[0:4]
B13, A15, B16, C14, C15
High
I/O
OVdd
WT
D2
Low
Output
OVdd
VDD
F6, F8, F9, F11, G7, G10, H6, H8, H9, H11,
J6, J8, J9, J11, K7, K10, L6, L8, L9, L11
2.0 V
VOLTDET
F3
High
Output
6
Notes:
1. OVdd supplies power to the processor bus, JTAG, and all control signals and Vdd supplies power to the processor
core and the PLL (after filtering to become AVDD). These columns serve as a reference for the nominal voltage
supported on a given signal as selected by the BVSEL pin configuration of Table 2 and the voltage supplied. For
actual recommended value of Vin or supply voltages see Table 3.
2. These are test signals for factory use only and must be pulled up to OVdd for normal machine operation.
3. This pin must be pulled up to OVdd for proper operation of the processor interface. To allow for future I/O voltage
changes, provide the option to connect BVSEL independently to either OVDD or to GND.
4. Uses 1 of 15 existing no-connects in MPC740 255 BGA package.
5. Internal pull up on die.
6. Internally tied to GND in the MPC745 255 BGA package to indicate to the power supply that a low-voltage
processor is present. This signal is not a power supply input.
Caution: This differs from the MPC755 360 BGA package.
Table 15. Pinout Listing for the MPC755, 360 BGA Package
Signal Name
Pin Number
Active
I/O
I/F Voltage1
Notes
A[0:31]
A13, D2, H11, C1, B13, F2, C13, E5, D13,
G7, F12, G3, G6, H2, E2, L3, G5, L4, G4, J4,
H7, E1, G2, F3, J7, M3, H3, J2, J6, K3, K2,
L2
High
I/O
OVdd
AACK
N3
Low
Input
OVdd
ABB
L7
Low
I/O
OVdd
AP[0:3]
C4, C5, C6, C7
High
I/O
OVdd
ARTRY
L6
Low
I/O
OVdd
AVDD
A8
2.0 V
BG
H1
Low
Input
OVdd
BR
E7
Low
Output
OVdd
BVSEL
W1
High
Input
OVdd
3, 5, 6
CI
C2
Low
Output
OVdd
CKSTP_IN
B8
Low
Input
OVdd
CKSTP_OUT
D7
Low
Output
OVdd
CLK_OUT
E3
Output
OVdd
Table 14. Pinout Listing for the MPC745, 255 PBGA Package (Continued)
Signal Name
Pin Number
Active
I/O
I/F Voltage1
Notes
相關(guān)PDF資料
PDF描述
MPC745BPX400LX 32-BIT, 400 MHz, RISC PROCESSOR, PBGA255
MPC755BPX300LX 32-BIT, 300 MHz, RISC PROCESSOR, PBGA360
MPC755BRX400LX 32-BIT, 400 MHz, RISC PROCESSOR, CBGA360
MPC755BRX450LE 32-BIT, 450 MHz, RISC PROCESSOR, CBGA360
MPC755CPX400 32-BIT, 400 MHz, RISC PROCESSOR, PBGA360
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