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| 型號(hào)： | MM908E630CVFC |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類(lèi)： | 微控制器/微處理器 |
| 英文描述： | MICROCONTROLLER, QCC44 |
| 封裝： | 9 X 9 MM, 1 MM HEIGHT, 0.65 MM PITCH, ROHS COMPLIANT, QFN-44 |
| 文件頁(yè)數(shù)： | 27/48頁(yè) |
| 文件大?。?/td> | 2299K |
| 代理商： | MM908E630CVFC |
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Analog Integrated Circuit Device Data
Freescale Semiconductor
33
908E630
FUNCTIONAL DEVICE OPERATION
LOGIC COMMANDS AND REGISTERS
SPI REGISTER OVERVIEW
Table 8 summarizes the SPI Register content for Control Information (C3:C0)=W and status information (S3:S0) = R.
Table 7. System Status Register
Adress(A3:A0)
Register Name / Read/Write Information
BIT
7
6
5
4
$0 - $F
SYSSR - System Status Register
R
VMS
LINS
HSS
LSS
Table 8. SPI Register Overview
Adress(A3:A0)
Register Name / Read/Write Information
BIT
3
2
1
0
$0
MCR - Mode Control Register
W
HVSE
0
MOD2
MOD1
VSR - Voltage Status Register
R
VSOV
VSUV
VDDOT
BATFAIL
$1
VSR - Voltage Status Register
R
VSOV
VSUV
VDDOT
BATFAIL
$2
WUCR - Wake-up Control Register
W
L4WE
L3WE
L2WE
L1WE
WUSR - Wake-up Status Register
R
L4
L3
L2
L1
$3
WUSR - Wake-up Status Register
R
L4
L3
L2
L1
$4
LINCR - LIN Control Register
W
DIS_J2602
RXONLY
LSR1
LSR0
LINSR - LIN Status Register
R
RXSHORT
TXDOM
LINOT
0
$5
LINSR - LIN Status Register
R
RXSHORT
TXDOM
LINOT
0
$6
HSCR - High Side Control Register
W
PWMHS2
PWMHS1
HS2
HS1
HSSR - High Side Status Register
R
HS2OP
HS2CL
HS1OP
HS1CL
$7
HSSR - High Side Status Register
R
HS2OP
HS2CL
HS1OP
HS1CL
$8
LSCR - Low Side Control Register
W
PWMLS2
PWMLS1
LS2
LS1
LSSR - Low Side Status Register
R
LS2OP
LS2CL
LS1OP
LS1CL
$9
LSSR - Low Side Status Register
R
LS2OP
LS2CL
LS1OP
LS1CL
$A
TIMCR - Timing Control Register
W
CS/WD
WD2
WD1
WD0
CYST2
CYST1
CYST0
WDSR - Watchdog Status Register
R
WDTO
WDERR
WDOFF
WDWO
$B
WDSR - Watchdog Status Register
R
WDTO
WDERR
WDOFF
WDWO
$C
AMUXCR - Analog Multiplexer Control Register
W
LXDS
MX2
MX1
MX0
$D
CFR - Configuration Register
W
HVDD
CYSX8
CSAZ
CSGS
$E
IMR - Interrupt Mask Register
W
HSM
LSM
LINM
VMM
ISR - Interrupt Source Register
R
ISR3
ISR2
ISR1
ISR0
$F
ISR - Interrupt Source Register
R
ISR3
ISR2
ISR1
ISR0
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