參數(shù)資料
型號: MM908E630CVFC
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: MICROCONTROLLER, QCC44
封裝: 9 X 9 MM, 1 MM HEIGHT, 0.65 MM PITCH, ROHS COMPLIANT, QFN-44
文件頁數(shù): 19/48頁
文件大?。?/td> 2299K
代理商: MM908E630CVFC
Analog Integrated Circuit Device Data
26
Freescale Semiconductor
908E630
FUNCTIONAL DEVICE OPERATION
OPERATIONAL MODES
In the 908E630 four main reset sources exist:
5.0 V Regulator Low-Voltage-Reset (VRSTTH)
The 5.0 V regulator output VDD is continuously monitored
against brown outs. If the supply monitor detects that the
voltage at the VDD pin has dropped below the reset threshold
VRSTTH, the analog die will issue a reset. In case of over-
temperature, the voltage regulator will be disabled and the
voltage monitoring will issue a VDDOT Flag independently of
the VDD voltage.
Windowing Watchdog Overflow
If the watchdog counter is not properly cleared while its
window is open for clears, the analog die will detect a MCU
die software runout and reset the microcontroller die.
Wake-up From Sleep Mode
During sleep mode, the 5.0 V regulator is not active, hence
all wake-ups from sleep mode require a power-up/reset
sequence.
External Reset
The analog die has a bidirectional reset pin which drives
the device to a safe state (same as Reset mode) for as long
as this pin is held low. RST_A must be held low for at least
long enough for the recognition by the internal deglitcher
filter. This functionality is also active in Stop mode.
After the RST_A pin is released, there is no extra 1.0 ms
reset delay time.
WAKE-UP CAPABILITIES
Once entered in one of the low-power modes (Sleep or
Stop), only wake-up sources can bring the device into normal
mode operation.
In Stop mode, a wake-up is signaled to the MCU as an
interrupt. While in Sleep mode, the wake-up is performed by
activating the 5.0 V regulator and resetting the MCU. In both
cases, the MCU can detect the wake-up source by accessing
the SPI registers. There is no specific SPI register bit to signal
a CS wake-up or external reset. If necessary, this condition is
detected by excluding all other possible wake-up sources.
Wake-up from Wake-up Inputs (L1-L4) Without Cyclic
Sense
The wake-up lines are dedicated to sense external switch
states and if changes occur to wake-up the MCU (in Sleep or
Stop modes).
In order to select and activate direct wake-up from Lx
inputs, the WUCR register must be configured with
appropriate LxWE inputs enabled or disabled. The wake-up
inputs state are read through SPI (register WUSR).
Lx inputs are also used to perform cyclic-sense wake-up.
Note: Selecting a Lx input in the analog multiplexer before
entering low power mode will disable the wake-up capability
of the LX input.
Cyclic Sense Wake-up Inputs (Cyclic Sense Timer and
Wake-up Inputs L1, L2, L3, L4)
The SBCLIN analog die can wake-up at the end of a cyclic
sense period if one of the four wake-up input lines (L1-L4)
state change should occur. The HSx switch is activated in
Sleep or Stop modes from an internal timer. Cyclic sense and
force wake-up are exclusive. If cyclic sense is enabled, the
force wake-up can not be enabled.
In order to select and activate the cyclic sense wake-up
from Lx inputs, before entering in low power modes (Stop or
Sleep modes), the following SPI set-up has to be performed:
In WUCR Register: select the LX input to enable.
In HSCR Register: select the HSx to enable.
In TIMCR register: select the CS/WD bit and determine
the cyclic sense period with CYSTx bits.
Forced Wake-up
The analog die can wake-up automatically after a
predetermined time spent in Sleep or Stop mode. Cyclic
sense and forced wake-up are exclusive. If force wake-up is
enabled, the cyclic sense can not be enabled.
To determine the wake-up period, the following SPI set-up
has to be sent before entering in low power modes:
In TIMCR register: select the CS/WD bit and determine
the low power mode period with CYSTx bits.
In HSCR register: all HSx bits must be disabled.
CS Wake-up
While in Stop mode, a rising edge on the CS will cause a
wake-up. CS wake-up do not generate interrupt and is not
reported on SPI.
LIN Wake-up
While in low power mode the 908E630 analog die monitors
the activity on the LIN bus. A dominant pulse larger than
tPROPWL (70 s typ.) followed by a dominant to recessive
transition will cause a LIN wake-up. This behavior protects
the system from a short-to ground bus condition.
RST_A Wake-up
While in Stop mode, the analog die can be wake-up, in
case the RST_A pin is held low for at least the deglitcher filter
period (600ns typ.). Then the analog die transitions to Normal
Request or Normal modes depending on the WDCONF pin
configuration. RST_A wake-up does not generate an
interrupt and is not reported on the SPI.
From Stop mode, the following wake-up events can be
configured:
Wake-up from Lx inputs without cyclic sense
Cyclic sense wake-up inputs
Force wake-up
CS wake-up
LIN wake-up
RST_A wake-up
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