參數(shù)資料
型號: ML610Q412P-XXXWA
廠商: LAPIS SEMICONDUCTOR CO LTD
元件分類: 微控制器/微處理器
英文描述: RISC MICROCONTROLLER, UUC95
封裝: 2.83 MM X 2.63 MM, 0.35 MM HEIGHT, 0.80 MM PITCH, DIE-95
文件頁數(shù): 4/152頁
文件大小: 1641K
代理商: ML610Q412P-XXXWA
ML610Q411/ML610Q412/ML610Q415 User’s Manual
Chapter 6
Clock Generation Circuit
6 – 16
6.4.2
Functioning P22 (LSCLK) as the low speed clock output
Set P22MD bit (bit2 of P2MOD register) to “1” for specifying the low speed clock output as the secondary function of
P22.
Reg. name
P2MOD register (Address: 0F214H)
Bit
7
6
5
4
3
2
1
0
Bit name
-
P22MD
P21MD
P20MD
Data
-
1
*
Set P22C1 bit (bit2 of P2CON1 register) to “1” and P22C0 bit (bit2 of P2CON0 register), for specifying P22 as
CMOS output.
Reg. name
P2CON1 register (Address: 0F213H)
Bit
7
6
5
4
3
2
1
0
Bit name
-
P22C1
P21C1
P20C1
Data
-
1
*
Reg. name
P2CON0 register (Address: 0F212H)
Bit
7
6
5
4
3
2
1
0
Bit name
-
P22C0
P21C0
P20C0
Data
-
1
*
Data of P22D bit (bit2 of P2D register) does not affect to the low speed clock output function, so don’t care the data
for the function.
Reg. name
P2D register (Address: 0F210H)
Bit
7
6
5
4
3
2
1
0
Bit name
-
P22D
P21D
P20D
Data
-
**
*
- : Bit does not exist.
* : Bit not related to the low speed clock function
** : Don’t care the data.
Note:
P22(Port2) is an output-only port, does not have an register to select the data direction(i.e. input or output).
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