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參數資料
| 型號： | ML60851EGA |
| 廠商： | LAPIS SEMICONDUCTOR CO LTD |
| 元件分類： | 總線控制器 |
| 英文描述： | UNIVERSAL SERIAL BUS CONTROLLER, PQFP44 |
| 封裝： | 0.80 MM PITCH, PLASTIC, QFP-44 |
| 文件頁數： | 7/85頁 |
| 文件大?。?/td> | 387K |
| 代理商： | ML60851EGA |
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FEDL60851E-01
OKI Semiconductor
ML60851E
14/84
FIFO Status Register 2 (FIFOSTAT2)
Read address
C4h
Write address
—
D7
D6
D5
D4
D3
D2
D1
D0
After a hardware reset
0
1
0
1
0
1
0
After a bus reset
0
1
0
1
0
1
0
Definition
0
This register reports the status of the EP0TXFIFO, the FIFO for EP2, and the FIFO for EP3. Normally, there is no
need to read this register because it is sufficient to read the packet ready status before reading out or writing in a
FIFO.
Transmit FIFO0 Full:
This bit becomes “1” when 8-bytes of data is stored in the EP0TXFIFO. This bit is
not set to “1” when a packet less than 8 bytes (a short packet) is written in.
Transmit FIFO0 Empty: This bit will be “1” when the EP0 transmit FIFO0 is empty.
FIFO2 Full:
This bit becomes “1” when 64 bytes of data is either stored or written in the FIFO for
EP2. This bit does not become “1” in the case of a short packet.
FIFO2 Empty:
This bit becomes “1” when the FIFO of EP2 is empty.
FIFO3 Full:
This bit becomes “1” when 64 bytes are written in the FIFO for EP3. This bit does not
become “1” in the case of a short packet.
FIFO3 Empty:
This bit becomes “1” when the FIFO for EP3 is empty.
Transmit FIFO0 Full (R)
Transmit FIFO0 Empty (R)
FIFO2 Full (R)
FIFO2 Empty (R)
FIFO3 Full (R)
FIFO3 Empty (R)
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相關代理商/技術參數 |
參數描述 |
|---|---|
| ML60851ETB | 制造商:OKI 制造商全稱:OKI electronic componets 功能描述:USB Device Controller |
| ML60852 | 制造商:OKI 制造商全稱:OKI electronic componets 功能描述:USB Device Controller |
| ML60852A | 制造商:OKI 制造商全稱:OKI electronic componets 功能描述:USB Device Controller |
| ML60852ATBZ010 | 功能描述:USB 接口集成電路 12 Mbps; USB Device Controller RoHS:否 制造商:Cypress Semiconductor 產品:USB 2.0 數據速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:WLCSP-20 |
| ML60852ATBZ03A | 制造商:ROHM Semiconductor 功能描述: |
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