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參數(shù)資料
| 型號： | MK20X512VMD100R |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | RISC MICROCONTROLLER, PBGA144 |
| 封裝： | 13 X 13 MM, MAPBGA-144 |
| 文件頁數(shù)： | 37/67頁 |
| 文件大小： | 997K |
| 代理商： | MK20X512VMD100R |
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Table 24. 16-bit ADC characteristics (VREFH = VDDA, VREFL = VSSA) (continued)
Symbol
Description
Min.
Typ.2
Max.
Unit
Notes
EIL
Input leakage er‐
ror
IIn × RAS
mV
IIn = leak‐
age cur‐
rent
(refer to
the MCU's
voltage
and cur‐
rent oper‐
ating rat‐
ings)
Temp sensor
slope
–40°C to 25°C
25°C to 105°C
—
TBD
—
mV/°C
VTEMP25
Temp sensor
voltage
25°C
—
TBD
—
mV
1. All accuracy numbers assume the ADC is calibrated with VREFH = VDDA
2. Typical values assume VDDA = 3.0 V, Temp = 25°C, fADCK = 2.0 MHz unless otherwise stated. Typical values are for
reference only and are not tested in production.
3. 1 LSB = (VREFH - VREFL)/2N
4. Input data is 1 kHz sine wave.
6.6.1.3 16-bit ADC with PGA operating conditions
Table 25. 16-bit ADC with PGA operating conditions
Symbol
Description
Conditions
Min.
Max.
Unit
Notes
VDDA
Supply voltage
Absolute
1.71
—
3.6
V
VREFPGA PGA ref voltage
VREFOUT VREFOUT VREFOUT
V
VADIN
Input voltage
VSSA
—
VDDA
V
RPGA
Input impedance Gain = 1, 2, 4, 8
Gain = 16, 32
Gain = 64
TBD
64
32
16
TBD
kΩ
RPGAD
Differntial input
impedance
Gain = 1, 2, 4, 8
Gain = 16, 32
Gain = 64
TBD
128
64
32
TBD
kΩ
IN+ to IN-
RAS
Analog source
resistance
Gain = 16, 32
—
100
—
Ω
TS
ADC sampling
time
Gain = 64
1.25
—
s
1. Typical values assume VDDA = 3.0 V, Temp = 25°C, fADCK = 6 MHz unless otherwise stated. Typical values are for
reference only and are not tested in production.
2. ADC must be configured to use the internal voltage reference (VREFOUT)
3. PGA reference connected to the VREFOUT pin. If the user wishes to drive VREFOUT with a voltage other than the output
of the VREF module, the VREF module must be disabled.
Peripheral operating requirements and behaviors
K20 Sub-Family Data Sheet Data Sheet, Rev. 1, 11/2010.
42
Preliminary
Freescale Semiconductor, Inc.
Preliminary
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