參數(shù)資料
型號: MK20X512VMD100R
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: RISC MICROCONTROLLER, PBGA144
封裝: 13 X 13 MM, MAPBGA-144
文件頁數(shù): 25/67頁
文件大小: 997K
代理商: MK20X512VMD100R
Table 18. Flash command timing characteristics (continued)
Symbol
Description
Min.
Typ.
Max.
Unit
Notes
teewr32bers Longword-write to erased FlexRAM location exe‐
cution time
200
TBD
μs
teewr16b32k Longword-write to FlexRAM execution time (32
KB EEPROM backup)
TBD
ms
teewr16b64k Longword-write to FlexRAM execution time (64
KB EEPROM backup)
TBD
2.7
ms
teewr32b128k Longword-write to FlexRAM execution time (128
KB EEPROM backup)
TBD
ms
teewr32b256k Longword-write to FlexRAM execution time (256
KB EEPROM backup)
TBD
3.7
ms
1. Assumes 25MHz flash clock frequency.
2. Maximum times for erase parameters based on expectations at cycling end-of-life.
3. For byte-writes to an erased FlexRAM location, the aligned word containing the byte must be erased.
6.4.1.3 Flash (FTFL) Current and Power Parameters
Table 19. Flash (FTFL) current and power parameters
Symbol
Description
Typ.
Unit
IDD_PGM
Worst case programming current in program flash
10
mA
6.4.1.4 Reliability Characteristics
Table 20. NVM reliability characteristics
Symbol
Description
Min.
Typ.1
Max.
Unit
Notes
Program Flash
tnvmretp10k Data retention after up to 10 K cycles
5
TBD
years
tnvmretp1k Data retention after up to 1 K cycles
10
TBD
years
tnvmretp100 Data retention after up to 100 cycles
15
TBD
years
nnvmcycp
Cycling endurance
10 K
TBD
cycles
Data Flash
tnvmretd10k Data retention after up to 10 K cycles
5
TBD
years
tnvmretd1k Data retention after up to 1 K cycles
10
TBD
years
tnvmretd100 Data retention after up to 100 cycles
15
TBD
years
nnvmcycd
Cycling endurance
10 K
TBD
cycles
FlexRAM as EEPROM
tnvmretee100 Data retention up to 100% of write endurance
5
TBD
years
Table continues on the next page...
Peripheral operating requirements and behaviors
K20 Sub-Family Data Sheet Data Sheet, Rev. 1, 11/2010.
Freescale Semiconductor, Inc.
Preliminary
31
Preliminary
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