參數(shù)資料
型號(hào)： MC9S12UF32PU
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 16-BIT, FLASH, 60 MHz, MICROCONTROLLER, PQFP100
封裝： LQFP-100
文件頁數(shù)： 91/128頁
文件大?。?/td> 1785K
代理商： MC9S12UF32PU
65
Freescale Semiconductor
System on a Chip Guide — 9S12UF32DGV1/D V01.05
Consult the Port Integration Module (PIM) PIM_9UF32 Block Guide, the CFHC Block Guide and the
ATA5HC Block Guide for information about pin configurations.
2.4.47 PS4 / CFIORD / ATAIORD — Port S I/O Pin 4
PS4 is a general purpose input or output pin. When the compact flash host controller (CFHC) is enabled
PS4 becomes the compact flash I/O read pin, CFIORD. When the CFHC is not enabled, it can be
configured as the ATA I/O read pin, ATAIORD, when the ATA5 host controller (ATA5HC) is enabled.
While in reset and immediately out of reset the PS4 pin is configured as a high impedance input pin.
Consult the Port Integration Module (PIM) PIM_9UF32 Block Guide, the CFHC Block Guide and the
ATA5HC Block Guide for information about pin configurations.
2.4.48 PS3 / CFCE2 / ATACS1 — Port S I/O Pin 3
PS3 is a general purpose input or output pin. When the compact flash host controller (CFHC) is enabled
PS3 becomes the compact flash chip enable 2 pin, CFCE2. When the CFHC is not enabled, it can be
configured as the ATA chip select 1 pin, ATACS1, when the ATA5 host controller (ATA5HC) is enabled.
While in reset and immediately out of reset the PS3 pin is configured as a high impedance input pin.
Consult the Port Integration Module (PIM) PIM_9UF32 Block Guide, the CFHC Block Guide and the
ATA5HC Block Guide for information about pin configurations.
2.4.49 PS2 / CFIOIS16 — Port S I/O Pin 2
PS2 is a general purpose input or output pin. When the compact flash host controller (CFHC) is enabled
PS2 becomes the compact flash I/O select 16-bit pin, CFIOIS16. While in reset and immediately out of
reset the PS2 pin is configured as a high impedance input pin. Consult the Port Integration Module (PIM)
PIM_9UF32 Block Guide and the CFHC Block Guide for information about pin configurations.
2.4.50 PS1 / CFOE — Port S I/O Pin 1
PS1 is a general purpose input or output pin. When the compact flash host controller (CFHC) is enabled
PS1 becomes the compact flash output enable pin, CFOE. While in reset and immediately out of reset the
PS2 pin is configured as a high impedance input pin. Consult the Port Integration Module (PIM)
PIM_9UF32 Block Guide and the CFHC Block Guide for information about pin configurations.
2.4.51 PS0 / CFCE1 / ATACS0 — Port S I/O Pin 0
PS0 is a general purpose input or output pin. When the compact flash host controller (CFHC) is enabled
PS0 becomes the compact flash chip enable 1 pin, CFCE1. When the CFHC is not enabled, it can be
configured as the ATA chip select 0 pin, ATACS0, when the ATA5 host controller (ATA5HC) is enabled.
While in reset and immediately out of reset the PS0 pin is configured as a high impedance input pin.
Consult the Port Integration Module (PIM) PIM_9UF32 Block Guide, the CFHC Block Guide and the
ATA5HC Block Guide for information about pin configurations.
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MC9S12XA256CAA 功能描述:16位微控制器 - MCU 9S12XA256 TSMC3 GENERAL RoHS:否 制造商:Texas Instruments 核心:RISC 處理器系列:MSP430FR572x 數(shù)據(jù)總線寬度:16 bit 最大時(shí)鐘頻率:24 MHz 程序存儲(chǔ)器大小:8 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:VQFN-40 安裝風(fēng)格:SMD/SMT
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MC9S12XA256CAG 功能描述:16位微控制器 - MCU 512K FLASH HCS12X MCU RoHS:否 制造商:Texas Instruments 核心:RISC 處理器系列:MSP430FR572x 數(shù)據(jù)總線寬度:16 bit 最大時(shí)鐘頻率:24 MHz 程序存儲(chǔ)器大小:8 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:VQFN-40 安裝風(fēng)格:SMD/SMT
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