
MC9S08GB/GT Data Sheet, Rev. 2.3
8
Freescale Semiconductor
Section Number
Title
Page
Chapter 4
Memory
4.1
MC9S08GB/GT Memory Map .......................................................................................................39
4.1.1
Reset and Interrupt Vector Assignments ..........................................................................39
Register Addresses and Bit Assignments ........................................................................................41
RAM ................................................................................................................................................46
FLASH ............................................................................................................................................46
4.4.1
Features ............................................................................................................................47
4.4.2
Program and Erase Times ................................................................................................47
4.4.3
Program and Erase Command Execution ........................................................................48
4.4.4
Burst Program Execution .................................................................................................49
4.4.5
Access Errors ...................................................................................................................50
4.4.6
FLASH Block Protection .................................................................................................51
4.4.7
Security ............................................................................................................................................52
FLASH Registers and Control Bits .................................................................................................53
4.6.1
FLASH Clock Divider Register (FCDIV) .......................................................................54
4.6.2
FLASH Options Register (FOPT and NVOPT) ..............................................................55
4.6.3
FLASH Configuration Register (FCNFG) .......................................................................56
4.6.4
FLASH Protection Register (FPROT and NVPROT) ......................................................56
4.6.5
FLASH Status Register (FSTAT) .....................................................................................58
4.6.6
FLASH Command Register (FCMD) ..............................................................................59
4.2
4.3
4.4
4.5
4.6
Chapter 5
Resets, Interrupts, and System Configuration
Introduction .....................................................................................................................................61
Features ...........................................................................................................................................61
MCU Reset ......................................................................................................................................61
Computer Operating Properly (COP) Watchdog .............................................................................62
Interrupts .........................................................................................................................................62
5.5.1
Interrupt Stack Frame ......................................................................................................63
5.5.2
External Interrupt Request (IRQ) Pin ..............................................................................64
5.5.2.1
Pin Configuration Options ..............................................................................64
5.5.2.2
Edge and Level Sensitivity ..............................................................................65
5.5.3
Interrupt Vectors, Sources, and Local Masks ..................................................................65
Low-Voltage Detect (LVD) System ................................................................................................67
5.6.1
Power-On Reset Operation ..............................................................................................67
5.6.2
LVD Reset Operation .......................................................................................................67
5.6.3
LVD Interrupt Operation .................................................................................................67
5.6.4
Low-Voltage Warning (LVW) ..........................................................................................67
Real-Time Interrupt (RTI) ...............................................................................................................67
5.1
5.2
5.3
5.4
5.5
5.6
5.7