
MC9S08GB/GT Data Sheet, Rev. 2.3
Freescale Semiconductor
11
Section Number
Title
Page
Chapter 8
Central Processor Unit (CPU)
8.1
8.2
8.3
Introduction ...................................................................................................................................125
Features .........................................................................................................................................126
Programmer’s Model and CPU Registers .....................................................................................126
8.3.1
Accumulator (A) ............................................................................................................127
8.3.2
Index Register (H:X) .....................................................................................................127
8.3.3
Stack Pointer (SP) ..........................................................................................................128
8.3.4
Program Counter (PC) ...................................................................................................128
8.3.5
Condition Code Register (CCR) ....................................................................................128
Addressing Modes .........................................................................................................................130
8.4.1
Inherent Addressing Mode (INH) ..................................................................................130
8.4.2
Relative Addressing Mode (REL) .................................................................................130
8.4.3
Immediate Addressing Mode (IMM) .............................................................................130
8.4.4
Direct Addressing Mode (DIR) .....................................................................................130
8.4.5
Extended Addressing Mode (EXT) ...............................................................................131
8.4.6
Indexed Addressing Mode .............................................................................................131
8.4.6.1
Indexed, No Offset (IX) ................................................................................131
8.4.6.2
Indexed, No Offset with Post Increment (IX+) .............................................131
8.4.6.3
Indexed, 8-Bit Offset (IX1) ...........................................................................131
8.4.6.4
Indexed, 8-Bit Offset with Post Increment (IX1+) .......................................131
8.4.6.5
Indexed, 16-Bit Offset (IX2) .........................................................................131
8.4.6.6
SP-Relative, 8-Bit Offset (SP1) ....................................................................131
8.4.6.7
SP-Relative, 16-Bit Offset (SP2) ..................................................................132
Special Operations .........................................................................................................................132
8.5.1
Reset Sequence ..............................................................................................................132
8.5.2
Interrupt Sequence .........................................................................................................132
8.5.3
Wait Mode Operation .....................................................................................................133
8.5.4
Stop Mode Operation .....................................................................................................133
8.5.5
BGND Instruction ..........................................................................................................134
HCS08 Instruction Set Summary ..................................................................................................134
Chapter 9
Keyboard Interrupt (KBI) Module
Introduction ...................................................................................................................................145
9.1.1
Port A and Keyboard Interrupt Pins ..............................................................................145
Features .........................................................................................................................................145
KBI Block Diagram ......................................................................................................................147
Keyboard Interrupt (KBI) Module ................................................................................................147
9.4.1
Pin Enables ....................................................................................................................147
9.4.2
Edge and Level Sensitivity ............................................................................................147
9.4.3
KBI Interrupt Controls ...................................................................................................148
KBI Registers and Control Bits .....................................................................................................148
9.5.1
KBI Status and Control Register (KBI1SC) ..................................................................148
9.5.2
KBI Pin Enable Register (KBI1PE) ..............................................................................150
8.4
8.5
8.6
9.1
9.2
9.3
9.4
9.5