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參數(shù)資料
| 型號(hào)： | MC9S08GB32 |
| 廠商： | 飛思卡爾半導(dǎo)體(中國(guó))有限公司 |
| 英文描述： | 8 bit Microcontroller Unit (MCU)(8位MCU) |
| 中文描述： | 8位微控制器（MCU）（8位微控制器） |
| 文件頁(yè)數(shù)： | 172/290頁(yè) |
| 文件大?。?/td> | 1314K |
| 代理商： | MC9S08GB32 |
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Serial Communications Interface (SCI) Module
MC9S08GB/GT Data Sheet, Rev. 2.3
172
Freescale Semiconductor
If no new character is waiting in the transmit data buffer after a stop bit is shifted out the TxD1 pin, the
transmitter sets the transmit complete flag and enters an idle mode, with TxD1 high, waiting for more
characters to transmit.
Writing0toTEdoesnotimmediatelyreleasethepintobeageneral-purposeI/Opin.Anytransmitactivity
that is in progress must first be completed. This includes data characters in progress, queued idle
characters, and queued break characters.
11.5.2
Send Break and Queued Idle
The SBK control bit in SCIxC2 is used to send break characters that were originally used to gain the
attentionofoldteletypereceivers.Breakcharactersareafullcharactertimeoflogic0(includinga0where
the stop bit would be normally). Normally, a program would wait for TDRE to become set to indicate the
last character of a message has moved to the transmit shifter, then write 1 and then write 0 to the SBK bit.
This action queues a break character to be sent as soon as the shifter is available. If SBK is still 1 when the
queued break moves into the shifter (synchronized to the baud rate clock), an additional break character is
queued. If the receiving device is another Freescale Semiconductor SCI, the break characters will be
received as 0s in all eight (or nine) data bits and a framing error (FE = 1).
When idle-line wakeup is used, a full character time of idle (logic 1) is needed between messages to wake
up any sleeping receivers. Normally, a program would wait for TDRE to become set to indicate the last
character of a message has moved to the transmit shifter, then write 0 and then write 1 to the TE bit. This
action queues an idle character to be sent as soon as the shifter is available. As long as the character in the
shifter does not finish while TE = 0, the SCI transmitter never actually releases control of the TxD1 pin. If
there is a possibility of the shifter finishing while TE = 0, set the general-purpose I/O controls so the pin
that is shared with TxD1 is an output driving a logic 1. This ensures that the TxD1 line will look like a
normal idle line even if the SCI loses control of the port pin between writing 0 and then 1 to TE.
11.6
Receiver Functional Description
In this section, the receiver block diagram (
Figure 11-4
) is used as a guide for the overall receiver
functional description. Next, the data sampling technique used to reconstruct receiver data is described in
more detail. Finally, two variations of the receiver wakeup function are explained.
11.6.1
Receiver Block Diagram
Figure 11-4
shows the receiver portion of the SCI.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MC9S08QG4CDNE | 8-BIT HCS08 Central Processor Unit |
| MC9S08QG4 | 8 bit Microcontroller Unit (MCU)(8位MCU) |
| MC9S08RE16 | 8 bit Microcontroller Unit (MCU)(8位MCU) |
| MC9S12A128 | 16 bit Microcontroller Unit (MCU)(16位MCU) |
| MC9S12A256CFU | Microcontroller Unit (MCU) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MC9S08GB32ACFUE | 功能描述:8位微控制器 -MCU 8 BIT 32K FLASH 4K RAM RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
| MC9S08GB32ACFUER | 制造商:Freescale Semiconductor 功能描述:8-BIT HCS08 CISC 32KB FLASH 2.5V/3.3V 64-PIN LQFP T/R - Tape and Reel |
| MC9S08GB32CB | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Microcontrollers |
| MC9S08GB32CFB | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Microcontrollers |
| MC9S08GB32CFD | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Microcontrollers |
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