參數(shù)資料
型號(hào)： MC92602ZTA
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： SPECIALTY MICROPROCESSOR CIRCUIT, PBGA196
封裝： 15 X 15 MM, 1.60 MM HEIGHT, 1 MM PITCH, MAPBGA-196
文件頁(yè)數(shù)： 35/102頁(yè)
文件大?。?/td> 1581K
代理商： MC92602ZTA
3-10
MC92602 SerDes Reference Manual
MOTOROLA
Functional Description
NOTE
8B/10B coding is meant only to improve data transmission
characteristics and is not a good error detection code. Many
8B/10B characters alias to other valid 8B/10B characters in the
presence of bit errors. Error detection and correction
techniques must be applied outside of the MC92602 if better
than 10-12 bit error rate is required.
3.3.6
Receiver Interface
Data in the alignment FIFO is presented at the receiver interface as double data rate (DDR)
on the rising and falling edge of the appropriate receiver clock, RECV_x_CLK. Along with
the data, information is also provided on the status of the link. Table 3-1 describes each of
the signals involved in receiver operation.
The receiver interface, through which received data is obtained, may be operated in byte or
ten-bit interface mode. There are several timing mode options for the receiver interface.
Each of the operating modes are described in the following sections.
3.3.6.1
Byte Interface
The receiver interface may be operated in byte or ten-bit interface, TBI, mode. Received
data is a byte (8 bits) of uncoded data when in byte mode. The internal 8B/10B decoder is
used to decode data from the 10-bit character received. Byte interface mode is enabled by
setting TBIE low.
Table 3-4 shows how data and status will appear on the receiver interface when in byte
mode.
NOTE
Do not use non-aligned mode in byte mode. Non-aligned mode
is only valid if TBIE is high.
3.3.6.2
Ten-Bit Interface
Received data is 10-bits of pre-coded data when in the ten-bit interface, TBI, mode. The
internal 8B/10B decoder is not used and it is assumed that decoding is done externally.
Ten-bit interface mode is enabled by setting TBIE high.
Table 3-4. Byte Mode (TBIE = Low) Receiver Outputs
Clock Edge
RECV_x_ERR
RECV_x_K
RECV_x_3
RECV_x_2
RECV_x_1
RECV_x_0
Rising
E0
K0
Data bit 3
Data bit 2
Data bit 1
Data bit 0 (LSB)
Falling
E1
K1
Data bit 7 (MSB)
Data bit 6
Data bit 5
Data bit 4
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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