參數(shù)資料
型號(hào)： MC7447RX1000NBR2
廠商： MOTOROLA INC
元件分類(lèi)： 微控制器/微處理器
英文描述： 32-BIT, 1000 MHz, RISC PROCESSOR, CBGA360
封裝： 25 X 25 MM, 3.20 MM HEIGHT, 1.27 MM PITCH, CERAMIC, FLIP CHIP, BGA-360
文件頁(yè)數(shù)： 44/87頁(yè)
文件大?。?/td> 1586K
代理商： MC7447RX1000NBR2
MOTOROLA
MPC7457 RISC Microprocessor Hardware Specifications
49
System Design Information
11110
PLL off
PLL off, no core clocking occurs
Notes:
1. PLL_CFG[0:4] settings not listed are reserved.
2. The sample bus-to-core frequencies shown are for reference only. Some PLL configurations may select bus, core,
or VCO frequencies which are not useful, not supported, or not tested for by the MPC7455; see Section 1.5.2.1,
“Clock AC Specifications,” for valid SYSCLK, core, and VCO frequencies.
3. In PLL-bypass mode, the SYSCLK input signal clocks the internal processor directly and the PLL is disabled.
However, the bus interface unit requires a 2x clock to function. Therefore, an additional signal, EXT_QUAL, must
be driven at one-half the frequency of SYSCLK and offset in phase to meet the required input setup tIVKH and hold
time tIXKH (see Table 9). The result is that the processor bus frequency is one-half SYSCLK while the internal
processor is clocked at SYSCLK frequency. This mode is intended for factory use and emulator tool use only.
Note: The AC timing specifications given in this document do not apply in PLL-bypass mode.
4. In PLL-off mode, no clocking occurs inside the MPC7455 regardless of the SYSCLK input.
Table 18. MPC7457 Microprocessor PLL Configuration Example for 1267 MHz Parts (continued)
PLL_
CFG[0:4]
Example Bus-to-Core Frequency in MHz (VCO Frequency in MHz)
Bus-to-
Core
Multiplier
Core-to-
VCO
Multiplier
Bus (SYSCLK) Frequency
33.3
MHz
50
MHz
66.6
MHz
75
MHz
83
MHz
100
MHz
133
MHz
167
MHz
相關(guān)PDF資料
PDF描述
MC7447RX1267LB 32-BIT, 1267 MHz, RISC PROCESSOR, CBGA360
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