參數(shù)資料
型號(hào): MC68HCP11A1CFN3
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: HCMOS Single-Chip Microcontroller
中文描述: 8-BIT, EEPROM, 3 MHz, MICROCONTROLLER, PQCC52
封裝: PLASTIC, LCC-52
文件頁(yè)數(shù): 98/158頁(yè)
文件大?。?/td> 776K
代理商: MC68HCP11A1CFN3
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MOTOROLA
9-18
RESETS, INTERRUPTS, AND LOW POWER MODES
MC68HC11A8
TECHNICAL DATA
9
the actual recovery sequence differs depending on the state of the X bit. If the X bit is
clear, the MCU starts up with the stacking sequence leading to normal service of the
XIRQ request. If the X bit is set, then processing will continue with the instruction im-
mediately following the STOP instruction and no XIRQ interrupt service routine is re-
quested. A reset will always result in an exit from the STOP mode, and the start of
MCU operation is determined by the reset vector.
SYMBOLS:
DATA
I
l/O
Hl ADD
LO ADD
ADD/DATA =Low byte of the address multiplexed with data.
OD
=Open drain output, ( ) current output state.
SS
=Steady state, output pin stays in current state.
SP-8
=Address output during WAI period following WAI instruction, stack point-
er value, at time of WAI, minus 8.
!!!
=XTAL is output but not normally usable for any output function beyond
crystal drive.
Since the oscillator is stopped in the STOP mode, a restart delay of 4064 clock cycle
times may be required to allow oscillator stabilization. If the internal oscillator is being
used, this delay is required; however, if a stable external oscillator is being used, a
control bit in the OPTION register may be used (DLY = 0) to give a delay of four cycles.
=Current data present.
=Input pin, if ( ) associated then this is required input state.
=Input/output pin, state determined by data direction register.
=High byte of the address.
=Low byte of the address.
Table 9-7 Pin State Summary for RESET, STOP, and WAIT
Pins
Single Chip Modes
RESET
Expanded Modes
WAIT
WAIT
STOP
RESET
STOP
Output Only
E
XTAL!!!
STRB/RW
PA3-PA6
PB0-PB7
Input/Output
RESET
MODA/LIR
MODB/V
STBY
STRA/AS
PA7
PC0-PC7
PD0-PD5
Input Only
EXTAL
IRQ
XIRQ
PA0-PA2
PE0-PE7
V
RH
-V
RL
Active E
Active
0
0
0
Active E
Active
SS
SS
SS
0
1
Active E
Active
1
0
Hl ADD
Active E
Active
1
SS
Hl ADD
0
1
1
SS
SS
SS
SS
Hl ADD
I (0)
I (0)
I
I
I (0)
I (1)
I
I
OD (1)
l (V
STBY
)
I (STRA)
I/O
I/O
I/O
OD (1)
l (V
STBY
)
I (STRA)
I/O
I/O
I/O
OD (1)
l (V
STBY
)
Active AS
l/O
OD (1)
l (V
STBY
)
0
I/O
LO ADD
I/O
I (MODB)
I (STRA)
I
I
I
I (MODES)
Active AS
I
ADD/DATA SP-8/DATA
I
I/O
Input Clock or Connect to Crystal with XTAL
Terminate Unused Inputs to V
DD
Terminate Unused Inputs to V
DD
Terminate Unused Inputs to V
DD
or V
SS
If Not Used, External Drive Not Required
If Not Used, External Drive Not Required
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