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參數(shù)資料
| 型號： | MC68HCP11A1CFN3 |
| 廠商： | MOTOROLA INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | HCMOS Single-Chip Microcontroller |
| 中文描述： | 8-BIT, EEPROM, 3 MHz, MICROCONTROLLER, PQCC52 |
| 封裝： | PLASTIC, LCC-52 |
| 文件頁數(shù)： | 90/158頁 |
| 文件大?。?/td> | 776K |
| 代理商： | MC68HCP11A1CFN3 |
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MOTOROLA
9-10
RESETS, INTERRUPTS, AND LOW POWER MODES
MC68HC11A8
TECHNICAL DATA
9
bit related interrupt structure has no effect on the X bit, the external XIRQ pin remains
effectively non-masked. In the interrupt priority logic, the XIRQ interrupt is a higher pri-
ority than any source that is maskable by the I bit. All I bit related interrupts operate
normally with their own priority relationship. When an I bit related interrupt occurs, the
I bit is automatically set by hardware after stacking the condition code register byte,
but the X bit is not affected. When an X bit related interrupt occurs, both the X bit and
the I bit are automatically set by hardware after stacking the condition code register.
An RTI (return from interrupt) instruction restores the X and I bits to their pre-interrupt
request state.
9.2.4 Priority Structure
Interrupts obey a fixed hardware priority circuit to resolve simultaneous requests; how-
ever, one I bit related interrupt source may be elevated to the highest I bit priority po-
sition in the resolution circuit. The first six interrupt sources are not masked by the I bit
in the condition code register and have the fixed priority interrupt relationship of: reset,
clock monitor fail, COP fail, illegal opcode, and XIRQ. (SWI is actually an instruction
and has highest priority other than reset in the sense that once the SWI opcode is
fetched, no other interrupt can be honored until the SWI vector has been fetched).
Each of these sources is an input to the priority resolution circuit. The highest I bit
masked priority input to the resolution circuit is assigned under software control (of the
HPRIO register) to be connected to any one of the remaining I bit related interrupt
sources. In order to avoid timing races, the HPRIO register may only be written while
the I bit related interrupts are inhibited (I bit in condition code register is a logic one).
An interrupt that is assigned to this high priority position is still subject to masking by
any associated control bits or the I bit in the condition code register. The interrupt vec-
tor address is not affected by assigning a source to this higher priority position.
Figure 9-4
,
Figure 9-5
, and
Figure 9-6
illustrate the interrupt process as it relates to
normal processing.
Figure 9-4
shows how the CPU begins from a reset and how in-
terrupt detection relates to normal opcode fetches.
Figure 9-5
is an expansion of a
block in
Figure 9-4
and shows how interrupt priority is resolved.
Figure 9-6
is an ex-
pansion of the SCI interrupt block in
Figure 9-5
.
Figure 9-6
shows the resolution of
interrupt sources within the SCI subsystem.
9.2.5 Highest Priority I Interrupt Register (HPRIO)
This register is used to select one of the I bit related interrupt sources to be elevated
to the highest I bit masked position in the priority resolution circuit. In addition, four mis-
cellaneous system control bits are included in this register.
RBOOT — Read Bootstrap ROM
The read bootstrap ROM bit only has meaning when the SMOD bit is a one (special
bootstrap mode or special test mode). At all other times, this bit is clear and may not
be written.
7
6
5
4
3
2
1
0
$
1
03C
RESET
RBOOT
—
SMOD
—
MDA
—
IRV
—
PSEL3
0
PSEL2
1
PSEL1
0
PSEL0
1
HPRIO
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MC68HCP11A1FN | 制造商:MOTORALA 功能描述: |
| MC68HCP11E0CP2 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| MC68HCP11E0FN | 功能描述:MICROCONTROLLER MCU 8ADC 3MHC RoHS:否 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:HC11 標準包裝:250 系列:56F8xxx 核心處理器:56800E 芯體尺寸:16-位 速度:60MHz 連通性:CAN，SCI，SPI 外圍設(shè)備:POR，PWM，溫度傳感器，WDT 輸入/輸出數(shù):21 程序存儲器容量:40KB（20K x 16） 程序存儲器類型:閃存 EEPROM 大小:- RAM 容量:6K x 16 電壓 - 電源 (Vcc/Vdd):2.25 V ~ 3.6 V 數(shù)據(jù)轉(zhuǎn)換器:A/D 6x12b 振蕩器型:內(nèi)部 工作溫度:-40°C ~ 125°C 封裝/外殼:48-LQFP 包裝:托盤 配用:MC56F8323EVME-ND - BOARD EVALUATION MC56F8323 |
| MC68HCP11E0FNE | 功能描述:8位微控制器 -MCU 8B MCU 512RAM COP A/D RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT |
| MC68HCP11E1CFNE2 | 功能描述:8位微控制器 -MCU 8B MCU 512 BYTES RAM RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT |
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