參數(shù)資料
型號: MC68HCP11A1CFN3
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: HCMOS Single-Chip Microcontroller
中文描述: 8-BIT, EEPROM, 3 MHz, MICROCONTROLLER, PQCC52
封裝: PLASTIC, LCC-52
文件頁數(shù): 76/158頁
文件大?。?/td> 776K
代理商: MC68HCP11A1CFN3
MOTOROLA
8-6
PROGRAMMABLE TIMER, RTI, AND PULSE ACCUMULATOR
MC68HC11A8
TECHNICAL DATA
8
OCxF — Output Compare x Flag
This flag bit is set each time the timer counter matches the output compare register x
value. A write of a zero does not affect this bit. A write of a one causes this bit to be
cleared.
ICxF — Input Capture x Flag
This flag is set each time a selected active edge is detected on the ICx input line. A
write of a zero does not affect this bit. A write of a one causes this bit to be cleared.
8.1.12 Timer Interrupt Mask Register 2 (TMSK2)
Timer interrupt mask register 2 is used to control whether or not a hardware interrupt
sequence is requested as a result of a status bit being set in timer interrupt flag register
2. In addition, two timer prescaler bits are included in this register. For each of the four
most significant bits in timer flag register 2, (TFLG2), there is a corresponding bit in the
timer mask register 2 (TMSK2) in the same bit position.
TOI — Timer Overflow Interrupt Enable
0 = TOF interrupts disabled
1 = Interrupt requested when TOF = 1
RTII — RTI Interrupt Enable
0 = RTIF interrupts disabled
1 = Interrupt requested when RTIF = 1
PAOVI — Pulse Accumulator Overflow Interrupt Enable
0 = PAOVF interrupts disabled
1 = Interrupt requested when PAOVF = 1
PAII — Pulse Accumulator Input Interrupt Enable
0 = PAIF interrupts disabled
1 = Interrupt requested when PAIF = 1
Bits 3 and 2 — Not Implemented
These bits always read zero.
7
6
5
4
3
2
1
0
$
1
023
RESET
OC1F
0
OC2F
0
OC3F
0
OC4F
0
OC5F
0
IC1F
0
IC2F
0
IC3F
0
TFLG1
7
TOI
0
6
5
4
3
0
0
2
0
0
1
0
$
1
024
RESET
RTII
0
PAOVI
0
PAII
0
PR1
0
PR0
0
TMSK2
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