參數(shù)資料
型號： MC68HCP11A1CFN3
廠商： MOTOROLA INC
元件分類： 微控制器/微處理器
英文描述： HCMOS Single-Chip Microcontroller
中文描述： 8-BIT, EEPROM, 3 MHz, MICROCONTROLLER, PQCC52
封裝： PLASTIC, LCC-52
文件頁數(shù)： 6/158頁
文件大?。?/td> 776K
代理商： MC68HCP11A1CFN3
MOTOROLA
vi
MC68HC11A8
TECHNICAL DATA
9.1.2.6
9.1.2.7
9.1.2.8
9.1.2.9
9.1.2.10
9.1.2.11
9.1.3
9.1.4
9.1.5
9.2
9.2.1
9.2.2
9.2.3
9.2.4
9.2.5
9.3
9.3.1
9.3.2
Pulse Accumulator ....................................................................9-4
COP ..........................................................................................9-4
SCI Serial l/O ............................................................................9-4
SPI Serial l/O .............................................................................9-4
A/D Converter ...........................................................................9-4
System ......................................................................................9-4
Computer Operating Properly (COP) Reset ......................................9-5
Clock Monitor Reset ..........................................................................9-6
Configuration Options Register (OPTION) ........................................9-6
Interrupts ...................................................................................................9-7
Software Interrupt (SWI) ....................................................................9-9
Illegal Opcode Trap ...........................................................................9-9
Interrupt Mask Bits in Condition Code Register ................................9-9
Priority Structure ..............................................................................9-10
Highest Priority I Interrupt Register (HPRIO) ..................................9-10
Low-Power Modes ...................................................................................9-17
WAIT Instruction ..............................................................................9-17
STOP Instruction .............................................................................9-17
10 CPU, ADDRESSING MODES, AND INSTRUCTION SET
10.1
10.1.1
10.1.2
10.1.3
10.1.4
10.1.5
10.1.6
10.1.6.1
10.1.6.2
10.1.6.3
10.1.6.4
10.1.6.5
10.1.6.6
10.1.6.7
10.1.6.8
10.2
10.2.1
10.2.2
10.2.3
10.2.4
10.2.5
10.2.6
10.2.7
10.3
CPU Registers .........................................................................................10-1
Accumulators A and B .....................................................................10-1
Index Register X (IX) .......................................................................10-1
Index Register Y (IY) .......................................................................10-2
Stack Pointer (SP) ...........................................................................10-2
Program Counter (PC) ....................................................................10-2
Condition Code Register (CCR) ......................................................10-2
Carry/Borrow (C) .....................................................................10-3
Overflow (V) ............................................................................10-3
Zero (Z) ...................................................................................10-3
Negative (N) ............................................................................10-3
Interrupt Mask (I) .....................................................................10-3
Half Carry (H) ..........................................................................10-3
X Interrupt Mask (X) ................................................................10-3
Stop Disable (S) ......................................................................10-3
Addressing Modes ...................................................................................10-3
Immediate Addressing .....................................................................10-4
Direct Addressing ............................................................................10-4
Extended Addressing ......................................................................10-4
Indexed Addressing .........................................................................10-4
Inherent Addressing ........................................................................10-4
Relative Addressing ........................................................................10-4
Prebyte ............................................................................................10-5
Instruction Set .........................................................................................10-5
A ELECTRICAL CHARACTERISTICS
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參數(shù)描述
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