參數(shù)資料
型號(hào)： MC68HC705F8FU
廠商： MOTOROLA INC
元件分類： 微控制器/微處理器
英文描述： 8-BIT, OTPROM, 1.8 MHz, MICROCONTROLLER, PQFP64
封裝： QFP-64
文件頁數(shù)： 66/126頁
文件大小： 736K
代理商： MC68HC705F8FU
MOTOROLA
5-8
MC68HC05F8
INTERRUPTS
5
5.4.1
Keyboard Control Register
KEYE
1 (set)
–
PA0-PA3 are congured as keyboard interrupt lines with internal
pull-up.
0 (clear) –
PA0-PA3 are congured as standard I/O lines.
KEYX7, KEYX6, KEYX5, KEYX4
These four bits congure their corresponding port A lines.
1 (set)
–
PAx is congured as a keyboard line with internal pull-up.
0 (clear) –
PAx is congured as a standard I/O line.
5.5
Programmable Timer (Timer A) Interrupt
Three timer interrupt ags are found in the three most signicant bits of the Timer Status register
(TSR) at location $19. All three interrupts will vector to the same address at location
$FFF6-$FFF7.
Each ag bit is dened as follows:
TOF - Timer Overow Flag
TOF is set during the counter transition of $FFFF to $0000. It is cleared by
reading the TSR (with TOF set) followed by reading the counter least signicant
byte ($1F).
OCF - Output Compare Flag
OCF is set when the Output Compare register matches the Counter register. It
is cleared by reading the TSR (with OCF set) and then accessing the Output
Compare register least signicant byte ($1D).
Address
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
State
on reset
$34
KEYE
KEYX7
KEYX6
KEYX5
KEYX4
0--- 000
Address
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
State
on reset
Timer Status Register
$19
ICF
OCF
TOF
uuu- ----
TPG
42
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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